|
Details, datasheet, quote on part number:MX29LV161BXBI-70R
| |
Datasheet text preview:
MX29LV161T/B
16M-BIT [2Mx8/1Mx16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY
FEATURES
· Extended single - supply voltage range 2.7V to 3.6V · 2,097,152 x 8/1,048,576 x 16 switchable · Single power supply operation - 3.0V only operation for read, erase and program operation · Fast access time: 70/90ns · Low power consumption - 20mA maximum active current - 0.2uA typical standby current · Command register architecture - Byte/word Programming (9us/11us typical) - Sector Erase (Sector structure 16K-Bytex1, 8K-Bytex2, 32K-Bytex1, and 64K-Byte x31) · Auto Erase (chip & sector) and Auto Program - Automatically erase any combination of sectors with Erase Suspend capability. - Automatically program and verify data at specified address · Erase suspend/Erase Resume - Suspends sector erase operation to read data from, or program data to, any sector that is not being erased, then resumes the erase. · Status Reply - Data polling & Toggle bit for detection of program and erase operation completion. Ready/Busy pin (RY/BY) - Provides a hardware method of detecting program or erase operation completion. Sector protection - Hardware method to disable any combination of sectors from program or erase operations - Temporary sector unprotect allows code changes in previously locked sectors. 100,000 minimum erase/program cycles Latch-up protected to 100mA from -1V to VCC+1V Boot Sector Architecture - T = Top Boot Sector - B = Bottom Boot Sector Low VCC write inhibit is equal to or less than 2.3V Package type: - 44-pin SOP - 48-pin TSOP - 48 Ball CSP Compatibility with JEDEC standard - Pinout and software compatible with single-power supply Flash
·
·
· · ·
· ·
·
GENERAL DESCRIPTION
The MX29LV161T/B is a 16-mega bit Flash memory organized as 2M bytes of 8 bits or 1M words of 16 bits. MXIC's Flash memories offer the most cost-effective and reliable read/write non-volatile random access memory. The MX29LV161T/B is packaged in 44-pin SOP, 48-pin TSOP, and 48CSP. It is designed to be reprogrammed and erased in system or in standard EPROM programmers. The standard MX29LV161T/B offers access time as fast as 70ns, allowing operation of high-speed microprocessors without wait states. To eliminate bus contention, the MX29LV161T/B has separate chip enable (CE) and output enable (OE) controls. MXIC's Flash memories augment EPROM functionality with in-circuit electrical erasure and programming. The MX29LV161T/B uses a command register to manage this functionality. The command register allows for 100% TTL level control inputs and fixed power supply levels during erase and programming, while maintaining maximum EPROM compatibility. MXIC Flash technology reliably stores memory contents even after 100,000 erase and program cycles. The MXIC cell is designed to optimize the erase and programming mechanisms. In addition, the combination of advanced tunnel oxide processing and low internal electric fields for erase and program operations produces reliable cycling. The MX29LV161T/B uses a 2.7V~3.6V VCC supply to perform the High Reliability Erase and auto Program/Erase algorithms. The highest degree of latch-up protection is achieved with MXIC's proprietary non-epi process. Latch-up protection is proved for stresses up to 100 milliamps on address and data pin from -1V to VCC + 1V.
P/N:PM0855
REV. 1.1, JUL. 03, 2002
1
MX29LV161T/B
PIN CONFIGURATIONS
44 SOP(500 mil)
RESET A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE GND OE Q0 Q8 Q1 Q9 Q2 Q10 Q3 Q11 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 WE A19 A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTE GND Q15/A-1 Q7 Q14 Q6 Q13 Q5 Q12 Q4 VCC
PIN DESCRIPTION
SYMBOL A0~A19 Q0~Q14 Q15/A-1 CE WE BYTE RESET OE RY/BY VCC GND PIN NAME Address Input Data Input/Output Q15(Word mode)/LSB addr(Byte mode) Chip Enable Input Write Enable Input Word/Byte Selection input Hardware Reset Pin/Sector Protect Unlock Output Enable Input Ready/Busy Output Power Supply Pin (2.7V~3.6V) Ground Pin
48 TSOP (Standard Type) (12mm x 20mm)
A15 A14 A13 A12 A11 A10 A9 A8 A19 NC WE RESET NC NC RY/BY A18 A17 A7 A6 A5 A4 A3 A2 A1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 A16 BYTE GND Q15/A-1 Q7 Q14 Q6 Q13 Q5 Q12 Q4 VCC Q11 Q3 Q10 Q2 Q9 Q1 Q8 Q0 OE GND CE A0
MX29LV161T/B
MX29LV161T/B
48-Ball CSP 8mm x 13mm (Ball Pitch=0.8mm) Top View, Balls Facing Down A 6 5 4 3 2 1 A13 A9 WE RY/BY A7 A3 B A12 A8 C A14 A10 D A15 A11 A19 NC A5 A1 E A16 Q7 Q5 Q2 Q0 A0 F BYTE Q14 Q12 Q10 Q8 CE G H
Q15/A-1 GND Q13 VCC Q11 Q9 OE Q6 Q4 Q3 Q1 GND
RESET NC NC A17 A4 A18 A6 A2
P/N:PM0855
REV. 1.1, JUL. 03, 2002
2
MX29LV161T/B
BLOCK STRUCTURE Table 1: MX29LV161T SECTOR ARCHITECTURE
Sector SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 SA20 SA21 SA22 SA23 SA24 SA25 SA26 SA27 SA28 SA29 SA30 SA31 SA32 SA33 SA34 Sector Size Byte Mode Word Mode 64Kbytes 32Kwords 64Kbytes 32Kwords 64Kbytes 32Kwords 64Kbytes 32Kwords 64Kbytes 32Kwords 64Kbytes 32Kwords 64Kbytes 32Kwords 64Kbytes 32Kwords 64Kbytes 32Kwords 64Kbytes 32Kwords 64Kbytes 32Kwords 64Kbytes 32Kwords 64Kbytes 32Kwords 64Kbytes 32Kwords 64Kbytes 32Kwords 64Kbytes 32Kwords 64Kbytes 32Kwords 64Kbytes 32Kwords 64Kbytes 32Kwords 64Kbytes 32Kwords 64Kbytes 32Kwords 64Kbytes 32Kwords 64Kbytes 32Kwords 64Kbytes 32Kwords 64Kbytes 32Kwords 64Kbytes 32Kwords 64Kbytes 32Kwords 64Kbytes 32Kwords 64Kbytes 32Kwords 64Kbytes 32Kwords 64Kbytes 32Kwords 32Kbytes 16Kwords 8Kbytes 4Kwords 8Kbytes 4Kwords 16Kbytes 8Kwords Address range Sector Address Byte Mode(x8) Word Mode(x16) A19 A18 A17 A16 A15 A14 A13 A12 000000-00FFFF 00000-07FFF 0 0 0 0 0 X X X 010000-01FFFF 08000-0FFFF 0 0 0 0 1 X X X 020000-02FFFF 10000-17FFF 0 0 0 1 0 X X X 030000-03FFFF 18000-1FFFF 0 0 0 1 1 X X X 040000-04FFFF 20000-27FFF 0 0 1 0 0 X X X 050000-05FFFF 28000-2FFFF 0 0 1 0 1 X X X 060000-06FFFF 30000-37FFF 0 0 1 1 0 X X X 070000-07FFFF 38000-3FFFF 0 0 1 1 1 X X X 080000-08FFFF 40000-47FFF 0 1 0 0 0 X X X 090000-09FFFF 48000-4FFFF 0 1 0 0 1 X X X 0A0000-0AFFFF 50000-57FFF 0 1 0 1 0 X X X 0B0000-0BFFFF 58000-5FFFF 0 1 0 1 1 X X X 0C0000-0CFFFF 60000-67FFF 0 1 1 0 0 X X X 0D0000-0DFFFF 68000-6FFFF 0 1 1 0 1 X X X 0E0000-0EFFFF 70000-77FFF 0 1 1 1 0 X X X 0F0000-0FFFFF 78000-7FFFF 0 1 1 1 1 X X X 100000-10FFFF 80000-87FFF 1 0 0 0 0 X X X 110000-11FFFF 88000-8FFFF 1 0 0 0 1 X X X 120000-12FFFF 90000-97FFF 1 0 0 1 0 X X X 130000-13FFFF 98000-9FFFF 1 0 0 1 1 X X X 140000-14FFFF A0000-A7FFF 1 0 1 0 0 X X X 150000-15FFFF A8000-AFFFF 1 0 1 0 1 X X X 160000-16FFFF B0000-B7FFF 1 0 1 1 0 X X X 170000-17FFFF B8000-BFFFF 1 0 1 1 1 X X X 180000-18FFFF C0000-C7FFF 1 1 0 0 0 X X X 190000-19FFFF C8000-CFFFF 1 1 0 0 1 X X X 1A0000-1AFFFF D0000-D7FFF 1 1 0 1 0 X X X 1B0000-1BFFFF D8000-DFFFF 1 1 0 1 1 X X X 1C0000-1CFFFF E0000-E7FFF 1 1 1 0 0 X X X 1D0000-1DFFFF E8000-EFFFF 1 1 1 0 1 X X X 1E0000-1EFFFF F0000-F7FFF 1 1 1 1 0 X X X 1F0000-1F7FFF F8000-FBFFF 1 1 1 1 1 0 X X 1F8000-1F9FFF FC000-ECFFF 1 1 1 1 1 1 0 0 1FA000-1FBFFF FD000-FDFFF 1 1 1 1 1 1 0 1 1FC000-1FFFFF FE000-FFFFF 1 1 1 1 1 1 1 X
Note: Byte mode:address range A19:A-1, word mode:address range A19:A0.
P/N:PM0855 REV. 1.1, JUL. 03, 2002
3
|
|
