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Part: CX28380-13ES
Category:
Communication
-> Network
-> Ethernet/DS1/E1 (T1/E1)
-> Framers/Mappers
Description: Quad T1/E1 Line Interface
Company: Mindspeed Technologies
Datasheet: Download CX28380-13ES datasheet File size : 1379 kB
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Datasheet text preview:
CX28380 Quad T1/E1 Line Interface
The CX28380 is a fully integrated quad line interface unit for both 1.544 Mbps (T1) and 2.048 Mbps (E1) applications. It is designed to complement T1/E1 framers or operate as a stand-alone line interface to synchronous or plesiochronous mappers and multiplexers. The device can be controlled by a serial port in host mode or by hardware mode operation in which device control and status are obtained through non-multiplexed dedicated pins. Many of these pins are also dedicated to individual channels for maximum flexibility and for use in redundant systems. Integrated in the CX28380 device is a clock rate adapter (CLAD) that provides various low-jitter programmable system clock outputs. The receive section of the CX28380 is designed to recover encoded signals from lines having more than 12 dB of attenuation. The transmit section consists of a programmable, precision pulse shaper.
Distinguishing Features
· · · Four T1/E1 short-haul line interfaces in a single chip On-chip CLAD/system synchronizer Digital (crystal-less) jitter attenuators selectable for transmitter/receiver on each line interface Meets AT&T publication 62411 jitter specs Meets ITU-T G.703, ETSI 300 011 (PSTNX) connection specifications AMI/B8ZS/HDB3 line codes Host serial port or hardware-only control modes On-chip receive clock recovery Common transformers for 120/75 E1 and 100 T1 Low-power 3.3 V power supply Transmitter performance monitor Compatible with latest ANSI, ITU-T, and ETSI standards 128-pin MQFP package Remote and local loopbacks
· · · · · · · · · · ·
Functional Block Diagram
Local Analog Loopback
RRING[1]
Jitter Attenuator
Remote Line Loopback
Local Digital Loopback
RTIP[1]
Receiver
Clock and Data Recovery
RLOS Detect
ZCS Decode
RPOSO[1] RNEGO[1] RCKO[1]
XTIP[1] XRING[1]
Driver
Pulse Shaping
TAIS
ZCS Encode
TPOSI[1] TNEGI[1] TCLK[1] LIU #1 LIU #2 LIU #3 LIU #4
Applications
· · · · · · · · · · · · SONET/SDH multiplexers T3 and E3/E4 (PDH) multiplexers ATM multiplexers Voice compression and voice processing equipment WAN routers and bridges Digital loop carrier terminals (DLC) HDSL terminal units Remote concentrators Central office equipment PBXs and rural switches PCM/voice channel banks Digital access and cross-connect systems (DACS)
JTAG Test Port 5 JTAG Test Signals 8380_001
Control 47 4
Clock Rate Adapter
Control and Host 10 MHz Variable 1.544 Alarm Signals Serial Fixed Reference MHz Port Reference
2.048 32.768 8 kHz32 MHz MHz MHz Selectable
500153B
Mindspeed TechnologiesTM
May 2002
Ordering Information
Model Number CX28380-xx Evaluation Module Package 128-pin MQFP BT00D660001 Operating Temperature 40 °C to +85 °C
Revision History
Revision A B A Level Advance Preliminary Preliminary Date August 2000 June 2001 August 2001
Created. Put into Mindspeed template. Switched to new document numbering system (formerly document # 100048B). Incorporated engineering edits. Incorporated engineering edits.
Description
B
Final
March 2001
© 2002, Mindspeed TechnologiesTM, A Conexant Business
All rights reserved. Infor mation in this document is provided in connection with Mindspeed Technologies ("Mindspeed") products. These materials are provided by Mindspeed as a service to its customers and may be used for informational purposes only. Mindspeed assumes no responsibility for errors or omissions in these materials. Mindspeed may make changes to specifications and product descriptions at any time, without notice. Mindspeed makes no commitment to update the information and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to its specifications and product descriptions. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Mindspeed's Terms and Conditions of Sale for such products, Mindspeed assumes no liability whatsoever. THESE MATERIALS ARE PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, RELATING TO SALE AND/OR USE OF MINDSPEED PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, CONSEQUENTIAL OR INCIDENTAL DAMAGES, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. MINDSPEED FURTHER DOES NOT WARRANT THE ACCURACY OR COMPLETENESS OF THE INFORMATION, TEXT, GRAPHICS OR OTHER ITEMS CONTAINED WITHIN THESE MATERIALS. MINDSPEED SHALL NOT BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, INCLUDING WITHOUT LIMITATION, LOST REVENUES OR LOST PROFITS, WHICH MAY RESULT FROM THE USE OF THESE MATERIALS. Mindspeed products are not intended for use in medical, lifesaving or life sustaining applications. Mindspeed customers using or selling Mindspeed products for use in such applications do so at their own risk and agree to fully indemnify Mindspeed for any damages resulting from such improper use or sale. The following are trademarks of Conexant Systems, Inc.: Mindspeed TechnologiesTM, the MindspeedTM logo, and "Build It First"TM. Product names or services listed in this publication are for identification purposes only, and may be trademarks of third parties. Third-party brands and names are the property of their respective owners. For additional disclaimer information, please consult Mindspeed Technologies Legal Information posted at www.mindspeed.com which is incorporated by reference.
500153B
Mindspeed TechnologiesTM
CX28380 Data Sheet
CX28398EVM Octal T1/E1 Evaluation Module
Eight RJ48C T1 or E1 Line Connections
CX28380 Quad T1/E1 LIU
CX28380 Quad T1/E1 LIU
Microprocessor Control
CX28398 Octal T1/E1 Framer
Local PCM Highway (i.e., 2 @ 8192 kbps)
8380_002
GENERAL NOTE:
1. Contact a Mindspeed representative for EVM availability and price.
Detailed Feature Summary
Interface Compatibility · · · T1.1021993 G.703 at 1.544 or 2.048 Mbps ITU-T Recommendation I.431 Line Codes · · Bipolar alternate mark inversion line coding Optional zero code suppression: T1: B8ZS E1: HDB3 Host Serial Interface · · · Compatible with existing framers Compatible with microprocessor serial ports Bit rates up to 8 Mbps
Receive Line Interface · · · External Termination Equalizer compensation for 20 dB bridged monitor levels +3 dB to 12 dB receiver sensitivity
In-Service Performance Monitoring Loopbacks · Remote loopback towards line With or without JAT Retains BPV transparency Local loopback towards system Analog line loopback Local digital loopback · Transmit alarm detectors: Loss of Transmit Clock (TLOC) Transmit Short Circuit (TSHORT) Receive alarm detectors: Loss of Signal (RLOS) Loss of Analog Input (RALOS) Bipolar/Line Code Violations Automatic and on-demand transmit alarms: AIS following TLOC Automatic AIS clock switching
·
Transmit Line Interface · · · · Pulse shapes for 0655 feet, in 133 ft. steps (T1 DSX1) External termination for improved return loss Line driver enable/disable for protection switching Output short circuit protection (for BABT applications)
·
Clock Rate Adapter · Outputs jitter attenuated line rate clock CLK1544 = 1,544 k (T1) CLK2048 = 2,048 k (E1) CLAD output supports 14 output clock frequencies: 8 kHz to 32,768 kHz Programmable input timing reference: Receive recovered clock from any channel Internal clock (REFCKI) CLADI Subrate CLADI timing reference: Line rate ÷ 2n, n = 0 to 7 References as low as 8 kHz
·
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Jitter Attenuator Elastic Store · · · Receive or transmit direction 8-, 16-, 32-, 64-, or 128-bit depth Manual centering ·
·
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Mindspeed TechnologiesTM
500153B
CX28380 Data Sheet
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500153B
Contents
Figures Tables
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xi
1.0 Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 2.0 Circuit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1
2.1 2.2 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 Configuration and Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3 2.2.1 Hardware Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3 2.2.2 Host Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3 2.2.3 Host Serial Control Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3 2.2.4 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5 2.2.4.1 Power-on Reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5 2.2.4.2 Hard Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6 2.2.4.3 Soft Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6 Receiver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7 2.3.1 Receive Termination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7 2.3.2 Data Recovery. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9 2.3.2.1 Raw Receive Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9 2.3.2.2 Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10 2.3.2.3 Bridge Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-11 2.3.2.4 Loss of Signal Detectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-11 2.3.3 Clock Recovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12 2.3.3.1 Phase Lock Loop. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12 2.3.3.2 Jitter Tolerance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12 2.3.4 Receive Jitter Attenuator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12 2.3.5 RZCS Decoder. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12 2.3.6 Receive Digital Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-13 2.3.6.1 Bipolar Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-13 2.3.6.2 Unipolar Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-13
2.3
500153B
Mindspeed TechnologiesTM
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