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Part: 7809LPRPFI
Category:
Data Conversion
-> ADC (Analog to Digital Converters)
Description: 16-bit Latchup Protected ADC
Company: Maxwell Technologies
Datasheet: Download 7809LPRPFI datasheet File size : 415 kB
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Datasheet text preview:
16-Bit Latchup Protected Analog to Digital Converter
7809LP
R/C
CS
POWER DOWN
Successive Approximation Register and Control Logic
Clock
CDAC 20 k R1IN 10 k R2IN 5 k R3IN 20 k Comparator Serial Data Out Data Clock Serial Data BUSY
CAP Buffer 4 k REF Internal +2.5V Ref.
Memory
Logic Diagram
FEATURES:
· RAD-PAK® radiation-hardened against natural space radiation · Total dose hardness: - > 100 krad (Si), depending upon space mission · Latch-up Protection Technology (LPTTM) · SEL converted into a reset - Rate based on cross section and mission · Same footprint as ADS7809 · Package: 24 pin RAD-PAK flat package · 100 kHz min sampling rate · ±10 V and 0 V to 5 V input range · Advanced CMOS technology · DNL: 16-bits "No Missing Codes" · 83 dB min SINAD with 20 kHz input · Single +5 V supply operation · Utilizes internal or external reference · Serial output · Power dissipation: 132 mW max
DESCRIPTION:
Maxwell Technologies' 7809LP high-speed 16-bit analog to digital converter features a greater than 100 kilorad (Si) total dose tolerance depending upon space mission. Using Maxwell's radiation-hardened RAD-PAK® packaging technology, the 7809LP has the same footprint as ADS7809 and is latchup protected by Maxwell Technologies' Latchup Protection Technology (LPTTM). It is a 24 pin, 16-bit sampling analog-to-digital converter using state-of-the-art CMOS structures. The 7809LP contains a 16-bit capacitor based SAR A/D with S/H, reference, clock, interface for microprocessor use, and serial output drivers. The 7809LP is specified at a 100kHz sampling rate, and guaranteed over the full temperature range. Lasertrimmed scaling resistors provide various input ranges include ±10 V and 0 to 5 V, while the innovative design allows operation from a single +5 V supply, with power dissipation of under 132 mW. Maxwell Technologies' patented RAD-PAK packaging technology incorporates radiation shielding in the microcircuit package. It eliminates the need for box shielding while providing the required radiation shielding for a lifetime in orbit or space mission. In a GEO orbit, RAD-PAK provides greater than 100 krad (Si) radiation dose tolerance. This product is available with screening up to Class K.
02.28.02 Rev 5
All data sheets are subject to change without notice
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(858) 503-3300- Fax: (858) 503-3301 - www.maxwell.com
©2001 Maxwell Technologies All rights reserved.
16-Bit Latchup Protected Analog to Digital Converter
TABLE 1. 7809LP PIN DESCRIPTION
PIN 1 2 3 4 5 6 7 8 SYMBOL R 1IN AGND1 R 2IN R 3IN C AP R EF AGND2 SB/BTC Analog Input. Analog Ground. Used internally as ground reference point. Analog Input. Analog Input. Reference Buffer Capacitor. 2.2 µF tantalum to ground. Reference Input/Output. 2.2 µF tantalum capacitor to ground. Analog Ground. DESCRIPTION
7809LP
Select Straight Binary or Binary Two's Complement data output format. If HIGH, data will be output in a Straight Binary format. If LOW, data will be output in a Binary Two's Complement format. Select External or Internal Clock for transmitting data. If HIGH, data will be output synchronized to the clock input on DATACLK. If LOW, a convert command will initiate the transmission of the data from the previous conversion, along with 16 clock pulses output on DATACLK. Digital Ground. Built In test function of the latchup protection. Drive LOW during normal operation.
9
EXT/INT
Memory
10 11 12 13 14 15 16
DGND LPBIT
LPSTATUS Latchup Protection Status Output. LPSTATUS when HIGH indicates latchup protection is active and output data is invalid. VANA VDIG SYNC DATACLK Analog Supply Input. Nominally 5V. Digital Supply Input. Nominally 5V. Sync Output. If EXT/INT is HIGH, either a rising edge on R/C with CS LOW or a falling edge on CS with R/C HIGH will output a pulse on SYNC synchronized to the external DATACLK. Either an input or an output depending on the EXT/INT level. Output data will be synchronized to this clock. If EXT/INT is LOW, DATACLK will transmit 16 pulses after each conversion, and then remain LOW between conversions. Serial Data Output. Data will be synchronized to DATACLK, with the format determined by the level of SB/BTC. In the external clock mode, after 16-bits of data, the 7809LOPO will output the level input of TAG as long as CS is LOW and R/C is HIGH. If EXT/INT is LOW, data will be valid on both the rising and falling edges of DATACLK, and between conversions DATA will stay at the level of the TAG input when the conversion was started. Tag input for use in external clock mode. If EXT/INT is HIGH, the digital data input on TAG will be output on DATA with a delay of 16 DATACLK pulses as long as CS is LOW and R/C is HIGH. Read/Convert Input. With CS LOW, a falling edge on R/C puts the internal sample/hold into the hold state and starts a conversion. When EXT/INT is LOW, this also initiates the transmission of the data results from the previous conversion. If EXT/INT is HIGH, a rising edge on R/C with CS LOW, or a falling edge on CS with R/C HIGH, transmits a pulse on SYNC and initiates the transmission of data from the previous conversion. Chip Select. Internally OR'ed with R/C.
17
DATA
18
TAG
19
R/C
20
CS
02.28.02 Rev 5
All data sheets are subject to change without notice
2
©2001 Maxwell Technologies All rights reserved.
16-Bit Latchup Protected Analog to Digital Converter
TABLE 1. 7809LP PIN DESCRIPTION
PIN 21 SYMBOL BUSY DESCRIPTION
7809LP
Busy Output. Falls when a conversion is started, and remains LOW until the conversion is completed and the data is latched into the output shift register. CS or R/C must be HIGH when BUSY rises, or another conversion will start without time for signal acquisition. Power Down Input. If HIGH, conversions are inhibited and power consumption is significantly reduced. Results from the previous conversions are maintained in the output shift register. Latchup Protection Analog Supply. Latchup Protection Digital Supply.
22 23 24
PWRD LPVANA LPVDIG
TABLE 2. 7809LP ABSOLUTE MAXIMUM RATINGS
PARAMETER Analog Inputs SYMBOL R1IN R2IN R3IN CAP REF 1 MIN -25 -25 -25 VANA + 0.3 -0.3 ---40 -0.3 TSTG -65 MAX 25 25 25 AGND2 - 0.3 0.3 7 7 0.3 85 VDIG + 0.3 150 U NIT V V V V V V V V
°C
Memory
Ground Voltage Differences: DGND, AGND2 VANA VD I G VDIG to VANA Operating Temperature Digital Inputs Storage Temperature 1. Indefinite short to AGND2, momentarily short to VANA.
V
°C
TABLE 3. DELTA LIMITS
PARAMETER Icc VARIATIONS +/- 10%
TABLE 4. 7809LP DC ACCURACY SPECIFICATIONS
(SPECIFIED PERFORMANCE -40 TO +85°C) PARAMETER Integral Linearity Error + 25°C -40 to 85°C Differential Linearity Error + 25°C -40 to 85°C SUBGROUPS 1 2, 3 1 2, 3
02.28.02 Rev 5
MIN -----
TYP -----
MAX ±3 ±5 -2, 3 -1, 6
U NIT LSB 1
LSB LSB
All data sheets are subject to change without notice
3
©2001 Maxwell Technologies All rights reserved.
16-Bit Latchup Protected Analog to Digital Converter
TABLE 4. 7809LP DC ACCURACY SPECIFICATIONS
(SPECIFIED PERFORMANCE -40 TO +85°C) PARAMETER No Missing Codes 2 Transition Noise 3 Full Scale Error 4,5 Full Scale Error 4,5 (using ext. 2.5000 Vref) Full Scale Error Drift Full Scale Error Drift (using ext. 2.5000 Vref) Bipolar Zero Error 4 Bipolar Zero Error Drift Unipolar Zero Error 4 + 25°C -40 to 85°C Unipolar Zero Error Drift Recovery to Rated Accuracy after Power Down (1 uF Capacitor to CAP) Power Supply Sensitivity (VDIG = VANA = VD) 4.75 V > VD < 5.2 V + 25°C -40 to 85°C 1. LSB stands for Least Significant Bit. One LSB is equal to 305 µV. 2. Not tested. 3. Typical rms noise at worst case transitions and temperatures. 4. Measured with various fixed resistors. 1 2, 3 1 2, 3 1, 2, 3 SUBGROUPS 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 MIN 15 -----------±7 ±2 -±2 --±2 1 TYP -1.3 --
7809LP
MAX --±0.6 ±0.6 --±10 -±3 ±16 --U NIT B its LSB % % ppm/ ° C p p m /° C mV ppm/°C mV mV ppm/ ° C ms LSB LSB
Memory
---
---
±8 ±32
5. For bipolar input ranges, full scale error is the worst case of -Full Scale or +Full Scale untrimmed deviation from ideal first and last scale code transitions, divided by the transition voltage (not divided by the full-scale range) and includes the effect of offset error. For unipolar input ranges, full scale error is the deviation of the last code transition divided by the transition voltage. It also includes the effect of offset error.
TABLE 5. 7809LP DIGITAL INPUTS
(SPECIFIED PERFORMANCE -40 TO +85°C) PARAMETER VI L VI H IIL, IIH 1, 2, 3 1, 2, 3 1, 2, 3 MIN -0.3 2.0 -TYP ---MAX 0.8 VD + 0.3 ±10 U NIT V V µA
TABLE 6. 7809LP ANALOG INPUT AND THROUGHPUT SPEED
(SPECIFIED PERFORMANCE -40 TO +85°C) PARAMETER Voltage Ranges Impedance
02.28.02 Rev 5
SUBGROUPS
MIN
TYP
MAX
U NIT
10 V, 0 V to 5 V See Table 2.
All data sheets are subject to change without notice
4
©2001 Maxwell Technologies All rights reserved.
16-Bit Latchup Protected Analog to Digital Converter
TABLE 6. 7809LP ANALOG INPUT AND THROUGHPUT SPEED
(SPECIFIED PERFORMANCE -40 TO +85°C) PARAMETER Capacitance Conversion Time Complete Cycle (Acquire and Convert) Throughput Rate 1 1. Tested by application of signal. 9, 10, 11 9, 10, 11 SUBGROUPS MIN ---100 TYP 35 7.6 ---
7809LP
MAX -8 10 -U NIT pF µs µs kHz
TABLE 7. 7809LP AC ACCURACY SPECIFICATIONS1
(SPECIFIED PERFORMANCE -40 TO +85°C) PARAMETER Spurious-Free Dynamic Range, fIN = 20 kHz 1 Total Harmonic Distortion, fIN = 20 kHz 1 Signal-to-Noise (Noise + Distortion) 1 fIN = 20 kHz -60 dB Input Signal-to-Noise 1, fIN = 20 kHz Full-Power Bandwidth 1,3 1. Guaranteed by design. 2. All specifications in dB are referred to a full-scale ±10 V input. 3. Full-Power Bandwidth defined as Full-Scale input frequency at which Signal-to-Noise (Noise + Distortion) degrades to 60 dB. SUBGROUPS MIN 90 -83 -83 -TYP 100 -100 88 30 88 250 MAX --90 ----dB kHz U NIT dB 2 dB
Memory
dB
TABLE 8. 7809LP SAMPLING DYNAMICS
(SPECIFIED PERFORMANCE -40 TO +85°C) PARAMETER Aperture Delay Aperture Jitter Transient Response FS Step Overvoltage Recovery 1 1. Recovers to specified performance after 2 X FS input overvoltage. --MIN -TYP 40 2 150 MAX ---U NIT ns us ns
Sufficient to meet AC specification
TABLE 9. 7809LP REFERENCE
(SPECIFIED PERFORMANCE -40 TO +85°C) PARAMETER Internal Reference Voltage C ONDITIONS No Load SU B G R O U P S 1, 2, 3
02.28.02 Rev 5
MIN 2.48
TYP 2.5
MAX 2.52
UNIT V
All data sheets are subject to change without notice
5
©2001 Maxwell Technologies All rights reserved.
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