Details, datasheet, quote on part number: 97SD3248
Part97SD3248
CategoryMemory => DRAM => SDR SDRAM => 1 Gb
Description1.5 GB (8-Meg X 48-Bit X 4 Banks)<<<>>>Features<<<>>><<<>>>1.5 Gigabit ( 8-Meg X 48-Bit X 4-Banks) <<<>>>RAD-PAK Radiation-hardened Against Natural Space Radiation <<<>>>Total Dose Hardness:<<<>>>>100 Krad (Si), Depending Upon Space Mission <<<>>>Excellent Single Event Effects:<<<>>>selth > 85 MeV/mg/cm2 @ 25 C <<<>>>JEDEC Standard 3.3V Power Supply <<<>>>Clock Frequency: 100 MHZ Operation <<<>>>Operating Tremperature: -55 to +125 C <<<>>>Auto Refresh <<<>>>Single Pulsed Ras <<<>>>2 Burst Sequence Variations<<<>>>sequential (BL =1/2/4/8)<<<>>>Interleave (BL = 1/2/4/8) <<<>>>Programmable Cas Latency: 2/3 <<<>>>Power Down And Clock Suspend Modes <<<>>>LVTTL Compatible Inputs And Outputs <<<>>>Package: 132 Lead Quad Stack Pack Flat Package <<<>>>Description<<<>>><<<>>>Maxwell Technologies Synchronous Dynamic Random Access Memory (SDRAM) is Ideally Suited For Space Applications Requiring High Performance Computing And High Density Memory Storage. As Microprocessors Increase in Speed And Demand For Higher Density Memory Escalates, Sdram Has Proven to be The Ultimate Solution BY Providing Bit-counts up to 1.5 Gigabits And Speeds up to 100 Megahertz. Sdrams Represent a Significant <<<>>>advantage in Memory Technology Over Traditional DRAMs Including The Ability to Burst Data Synchronously at High Rates With Automatic Column-address Generation, The Ability to Interleave Between Banks Masking Precharge Time.
CompanyMaxwell Technologies
DatasheetDownload 97SD3248 datasheet
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Packages132 Lead Quad Stack Pack Flat Package
  

 

Features, Applications

1.5 Giggabit X 4-Banks) RAD-PAK radiation-hardened against natural space radiation Total Dose Hardness: >100 krad (Si), depending upon space mission Excellent Single Event Effects: SELTH @ 25C JEDEC Standard 3.3V Power Supply Clock Frequency: 100 MHz Operation Operating tremperature: to +125 C Auto Refresh Single pulsed RAS 2 Burst Sequence variations Sequential (BL =1/2/4/8) Interleave (BL = 1/2/4/8) Programmable CAS latency: 2/3 Power Down and Clock Suspend Modes LVTTL Compatible Inputs and Outputs Package: 132 Lead Quad Stack Pack Flat Package

Maxwell Technologies' Synchronous Dynamic Random Access Memory (SDRAM) is ideally suited for space applications requiring high performance computing and high density memory storage. As microprocessors increase in speed and demand for higher density memory escalates, SDRAM has proven to be the ultimate solution by providing bit-counts to 1.5 Gigabits and speeds to 100 Megahertz. SDRAMs represent a significant advantage in memory technology over traditional DRAMs including the ability to burst data synchronously at high rates with automatic column-address generation, the ability to interleave between banks masking precharge time Maxwell Technologies' patented RAD-PAK packaging technology incorporates radiation shielding in the microcircuit package. It eliminates the need for box shielding for a lifetime in orbit or space mission. In a typical GEO orbit, RAD-PAK provides greater than 100 krads(Si) radiation dose tolerance. This product is available with screening up to Class K.

All data sheets are subject to change without notice

The 97SD3248 Consists X 4-Banks, die. CKE CS 1-6 and DQM 1-6 correspond to one of the die: CKE1, CS1 and DQM1 control CKE2, CS2 and DQM2 control CKE3, CS3 and DQM3 control CKE4, CS4 and DQM4 control CKE5, CS5 and DQM5 control CKE6, CS6 and DQM6 control - D47

PARAMETER Voltage on any pin relative to VSS Supply voltage relative to VSS Short circuit output current Operating Temperature Storage Temperature SYMBOL VIN VOUT VCC IOUT TOPR TSTG MAX -0.5 to VCC to +150 UNIT mA C

PARAMETER Supply Voltage SYMBOL M AX VCC, 3.0 3.6 VSS, VSSQ3 0 Input High Voltage VIH1,4 2.0 VCC + 0.3 Input Low Voltage 0.8 1. All voltage referred to VSS 2. The supply voltage with all VCC and VCCQ pins must be on the same level 3. The supply voltage with all V SS and V SSQ pins must be on the same level 4. 5. VIH (max) = VCC+2.0V for pulse width <3ns at VCC VIL (min) = VSS-2.0V for pulse width <3ns at VSS UNIT

PARAMETER ICC2N ICC2NS DESCRIPTION Operating Current Power Down Standby Current VARIATION1 10%
Active Standby Current 10% of value specified in Table 4

(VCC + 0.3V, VCCQ TO 125C, UNLESS OTHERWISE SPECIFIED) PARAMETER Operating Current1,2,3 SYMBOL ICC1 TEST CONDITIONS Burst length CAS Latency 2 =1 CAS Latency = 3 tRC = min CKE = VIL tCK 12 ns CKE = VIL tCK = 0 SUBGROUPS 2, 3 MIN MAX mA UNITS mA

Standby Current in Power Down4 Standby Current in Power Down ( input signal stable)5

 

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