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Part: ML65T541CS
Category:
Description: 3.3v High Speed Octal Buffer/line Driver
Company: Micro Linear
Datasheet: Download ML65T541CS datasheet File size : 123 kB
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Datasheet text preview:
May 1997
ML65T541* 3.3V High Speed Octal Buffer/Line Driver
GENERAL DESCRIPTION
The ML65T541 is a non-inverting octal buffer/line driver. The high operating frequency (66MHz driving a 50pF load) and low propagation delay (2ns) make it ideal for very high speed applications such as processor bus buffering cache/main memory control. The ML65T541 uses a unique analog implementation to eliminate the delays inherent in traditional digital designs. Schottky clamps reduce undershoot and overshoot, and special output driver circuits limit ground bounce. The ML65T541 conforms to the pinout and functionality of the industry standard FCT541 and is intended for applications where propagation delay is critical to the system design.
FEATURES
s Low propagation delay -- 2.0ns s Fast 8-bit buffer/line driver with three-state capability on the output s Schottky diode clamps on all inputs to handle undershoot and overshoot s Onboard schottky diodes minimize noise s Ground bounce controlled outputs s Industry standard FCT541 type pinout s Applications include high speed cache memory, main memory, processor bus buffering, and graphics cards
BLOCK DIAGRAM
*Some Packages Are Obsolete
VCC 20 VCC OE1 1 OE2 19
A0 2
A1 3
A2 4
A3 5
A4 6
A5 7
A6 8
A7 9
10 GND
18 B0
17 B1
16 B2
15 B3
14 B4
13 B5
12 B6
11 B7
*Some packages are obsolete
ML65T541
PIN CONFIGURATION
20-Pin QSOP
1G A0 YB0 A1 YB1 A2 YB2 A3 YB3 GND
1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11
VCC 2G YA0 B0 YA1 B1 YA2 B2 YA3 B3
TOP VIEW
PIN DESCRIPTION
NAME Ai Bi OE1 & OE2 GND VCC I/O I O I I I DESCRIPTION Data Bus A Data Bus B Output Enable Signal Ground 3.3V supply
FUNCTION TABLE
OE1/OE2 H L L
L H X Z = Logic Low = Logic High = Don't Care = High Impedance
A X L H
B Z L H
ABSOLUTE MAXIMUM RATINGS
VCC ....... 0.3V to 7V DC Input voltage ........ 0.3 to VCC + 0.3V AC Input voltage (< 20ns) ....... 3.0V DC Output voltage ..... 0.3 to VCC + 0.3V Output sink current (per pin) ........ 120mA Storage temperature ........ 65°C to 150°C Junction temperature .... 150°C Thermal Impedance (JA) SOIC ...... 96°C/W QSOP ... 100°C/W
2
ML65T541
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER
Unless otherwise stated, these specifications apply for: VCC = 3.3V ± 10%, TA = 0°C to 70°C (Note 1)
CONDITIONS MIN TYP MAX UNITS
AC ELECTRICAL CHARACTERISTICS (CLOAD = 50pF, RLOAD = 500) tPLH, tPHL tOE tOD CIN Propagation delay Output enable time OE1, OE2 to Bi Output disable time OE1, OE2 to Bi Input capacitance Ai to Bi (Note 2) 1.4 10 15 8 2.0 20 20 ns ns ns pF
DC ELECTRICAL CHARACTERISTICS (CLOAD = 50pF, RLOAD = ) VIH VIL IIH IIL IHI-Z IOS VIC VOH VOL ICC
Note 1: Note 2: Note 3: Note 4: Note 5: Note 6:
Input high voltage Input low voltage Input high current Input low current
Logic HIGH (Note 3) Logic LOW (Note 3) Per pin, VIN = 3V Per pin, VIN = 0
2.0 0.8 0.2 0.3 0.8 0.8 5 60 0.7 2.4 0.6 55 80 225 1.2
V V mA mA µA mA V V V mA
Three-state output current 0 < VIN < VCC Short circuit current Input clamp voltage Output high voltage Output low voltage Quiescent Power Supply Current VO = GND (Note 4) IIN = 18mA IOH = 100µA (Note 5) IOL = 5mA (Notes 5,6) Freq = 0Hz, VIN = 0V, outputs open
Limits are guaranteed by 100% testing, sampling or correlation with worst case test conditions. One line switching, see Figure 3, tPLH, tPHL versus CL. Inputs should be driven to within 0.3V of the rail. Although the inputs are TTL compatible, at the minimum logic high voltage, the circuit will draw current due to the buffer action ( 20mA per channel). Not more than one output should be shorted for more than a second. See Figure 2 for IOH versus VOH and IOL versus VOL data. The output can source or sink more than 100 mA when switching. IOL is only significant as a DC specification.
tR, tF 4ns, f = 66MHz 3V INPUT 0V 3V OUTPUT 0V 1.5V 1.5V tPLH 1.5V 1.5V tPHL
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