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Part: ML6651
Category:
Communication
-> Network
-> Ethernet/DS1/E1 (T1/E1)
Description: Auto-negotiating Media Converter
Company: Micro Linear
Datasheet: Download ML6651 datasheet File size : 123 kB
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Datasheet text preview:
ADVANCED Information
ML6651 Auto-Negotiating Media Converter
GENERAL DESCRIPTION
The ML6651 converts signals transmitted between twisted pair and fiber optic Ethernet technologies. It supports conversion between 10BASE-T and 10BASE-FL, between 100BASE-TX and 100BASE-FX/SX, and between FLP (fast link pulse) bursts and FLNP (fiber link negotiation pulse) bursts. Either 850nm or 1300nm laser optics can be used for both 10 and 100 Mb/second operating data rates while fully auto-negotiating for speed and duplex mode communication. One or both of the fiber optic and twisted pair interfaces can be set to interface with industry standard 1x9 fiber optic PMD modules, using PECL or LVPECL compatible modes.
F E AT U R E S
s Complete implementation of fiber optic and twisted pair media interface s ISO/IEC 8802.3, IEEE 802.3 and TIA/EIA-785 compliance, including full auto-negotiation for twisted pair and fiber optic media s 850nm, 1300nm and 1x9 PMD modules s Supports 1:1 receiver/transmitter transformer ratio for twisted pair s Low latency 10Mb/s path s Integrated voltage and current references s Integrated twisted pair output wave shaping eliminate external filtering s Integrated twisted pair 10BASE-T input filter and 100BASE-TX equalizer with baseline wander correction circuit
ADVANCED DATASHEET
September 2000
ADVANCED
TABLE OF CONTENTS
ML6651
General Description ...... 1 Features ......... 1 Warranty Information .. ........... 2 Block Diagram ........ 3 Pin Configuration .... 4 Pin Descriptions ...... 4 Physical Dimensions ............ 10 Order Information ..... ........... 10
WARRANTY
Micro Linear makes no representations or warranties with respect to the accuracy, utility, or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. No license, express or implied, by estoppel or otherwise, to any patents or other intellectual property rights is granted by this document. The circuits contained in this document are offered as possible applications only. Particular uses or applications may invalidate some of the specifications and/or product descriptions contained herein. The customer is urged to perform its own engineering review before deciding on a particular application. Micro Linear assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of Micro Linear products including liability or warranties relating to merchantability, fitness for a particular purpose, or infringement of any intellectual property right. Micro Linear products are not designed for use in medical, life saving, or life sustaining applications. © Micro Linear 2000. property of their respective owners. is a registered trademark of Micro Linear Corporation. All other trademarks are the
Products described herein may be covered by one or more of the following U.S. patents: 4,897,611; 4,964,026; 5,027,116; 5,281,862; 5,283,483; 5,418,502; 5,508,570; 5,510,727; 5,523,940; 5,546,017; 5,559,470; 5,565,761; 5,592,128; 5,594,376; 5,652,479; 5,661,427; 5,663,874; 5,672,959; 5,689,167; 5,714,897; 5,717,798; 5,742,151; 5,747,977; 5,754,012; 5,757,174; 5,767,653; 5,777,514; 5,793,168; 5,798,635; 5,804,950; 5,808,455; 5,811,999; 5,818,207; 5,818,669; 5,825,165; 5,825,223; 5,838,723; 5.844,378; 5,844,941. Japan: 2,598,946; 2,619,299; 2,704,176; 2,821,714. Other patents are pending.
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Advanced Datasheet
September 2000
ADVANCED
BLOCK DIAGRAM
ML6651
35
38
41
17
15
2
33
32
18
23
11
39
TPOUTP TPOUTN
1 3 Twisted Pair
Auto Negation Processing 10Mb/s Processing
33 FOINP Fiber Optic 32 FOINN 30 CQOS / PECL Input 29 SDFO 39 SDTH
RTTP
38
/ PECL Output
100Base-TX Descrambler
100Mb/s Clock and Data Recovery
TPINP TPINN
10 11 Twisted Pair
100Mb/s Clock and Data Recovery 10Mb/s Processing
100Base-TX Descrambler
Fiber Optic
21 IOUT 22 IOUT
REQSD
37
/ PECL Input Auto Negation Processing
/ PECLOutput
36 RTOP
REFCLK
18
STATUS LED & Backup Link
Configuration and Control Logic
Management Interface
Trimming
44
FOANDT
42
FOINSPD
43
TPANDT
41
TPINSPD
40 24 14 13 7 8
PWRDWN TPOUTOFF PECLTP PECLQU BCKLINK FOOUTOFF
4
AD4LIW
5
AD32
6
AD10
23 25
SPEED DUPLI|EX
17
MDC
16
MDIO
2 9 12 15 19 20 23 26 28 31 34 35
GNDT VCCE GNDE GNDD VCCD GNDL VCCL VCCFC GNDFC VCCQ GNDQ GNDB
September 2000
Advanced Datasheet
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