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Part: 27C16A-25TS
Category:
Memory
-> ROM
-> EEPROM
Description: 16k ( 2k X 8 ) CMOS EePROM
Company: Microchip Technology, Inc.
Datasheet: Download 27C16A-25TS datasheet File size : 901 kB
Request For quote: Find where to buy 27C16A-25TS
Datasheet text preview:
28C16A
16K (2K x 8) CMOS EEPROM
FEATURES
· Fast Read Access Time--150 ns · CMOS Technology for Low Power Dissipation - 30 mA Active - 100 µA Standby · Fast Byte Write Time--200 µs or 1 ms · Data Retention >200 years · High Endurance - Minimum 104 Erase/Write Cycles · Automatic Write Operation - Internal Control Timer - Auto-Clear Before Write Operation - On-Chip Address and Data Latches · Data polling · Chip Clear Operation · Enhanced Data Protection - VCC Detector - Pulse Filter - Write Inhibit · Electronic Signature for Device Identification · 5-Volt-Only Operation · Organized 2Kx8 JEDEC Standard Pinout · 24-pin Dual-In-Line Package · 32-pin PLCC Package · 28-pin Thin Small Outline Package (TSOP) 8x20mm · 28-pin Very Small Outline Package (VSOP) 8x13.4mm · Available for Extended Temperature Ranges: - Commercial: 0°C to +70°C - Industrial: -40°C to +85°C
PACKAGE TYPES
32 W c c 31 N E 3N 4 A7 2 NC 1 NC
VU
A7 A6 A5 A4 A3 A2 A1 I0 I/O0 I/O1 /V 2 O
SS
· Pin 1 indicator on PLCC on top of package
OE N AC A9 N8 WC VE cc N NC AC A7 A6 A5 A4 3 2 1 3 4 5 6 7 8 9 1 10 11 12 13 4
OE N AC A9 8 WC N VE
CC
I/O1 V2 /O Ns s IU I/O3 I/O4 /O5
28 27 26 25 24 23 22 21 10 19 18 17 16 5
21 10 9 18 7 16 5 14 13 2 11 9 0 8 C A10 E I/O7 /O6 A I/O5 I/O4 /O3 VSS I/O2 I/O1 /O0 A0 1 A2
·1 3 2 4 5 6 7 8 9 1 10 11 2
24 2 23 22 21 10 19 18 17 16 15 14 3
Vcc A8 A6 W 9 A5 OE A4 AE A3 C10 A2 IE A1 I/O7 N 0 I/O6 I C I/O5 /O0 I/O4 /O3
3
0 29 A8 28 N9 27 NC 26 OC 25 A E 24 C10 23 I E 22 I/O7 1
6 5 7 8
9 1 10 11 12 3 14 15 16
C /O6
0
P LC C
17
18
29
DIP
22 23 4 25 26 27 8 2 1 3 4 5 7 6
C A10 IE I/07 I/06 I/05 I/04 V03 / I ss I/02 I/01 A00 / A0 A1 2
TSOP VSOP
NC NC A 7 A6 5 A4 3
DESCRIPTION
The Microchip Technology Inc. 28C16A is a CMOS 16K non-volatile electrically Erasable PROM. The 28C16A is accessed like a static RAM for the read or write cycles without the need of external components. During a "byte write", the address and data are latched internally, freeing the microprocessor address and data bus for other operations. Following the initiation of write cycle, the device will go to a busy state and automatically clear and write the latched data using an internal control timer. To determine when a write cycle is complete, the 28C16A uses Data polling. Data polling allows the user to read the location last written to when the write operation is complete. CMOS design and processing enables this part to be used in systems where reduced power consumption and reliability are required. A complete family of packages is offered to provide the utmost flexibility in applications.
BLOCK DIAGRAM
I/O0 I/O7
VSS VCC
CE
OE
WE
Data Protection Circuitry Chip Enable/ Output Enable Control Logic
Auto Erase/Write Timing
Data P oll
Input/Output B uffers
Program Voltage Generation A0
a L t c h e s
DY ecoder
Y Gating
DX ecoder
16K bit Cell Matrix
A10
© 1996 Microchip Technology Inc.
DS11125G-page 1
This document was created with FrameMaker 4 0 4
28C16A
1.0
1.1
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS*
TABLE 1-1:
Name A0 - A10 CE OE WE I/O0 - I/O7 VCC VSS NC NU
PIN FUNCTION TABLE
Function Address Inputs Chip Enable Output Enable Write Enable Data Inputs/Outputs +5V Power Supply Ground No Connect; No Internal Connection Not Used; No External Connection is Allowed
VCC and input voltages w.r.t. VSS ....... -0.6V to + 6.25V Voltage on OE w.r.t. VSS ............ -0.6V to +13.5V Voltage on A9 w.r.t. VSS .... -0.6V to +13.5V Output Voltage w.r.t. VSS ....... -0.6V to VCC+0.6V Storage temperature .. -65°C to +125°C Ambient temp. with power applied ....... -50°C to +95°C
*Notice: Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
TABLE 1-2:
READ/WRITE OPERATION DC CHARACTERISTICS
VCC = +5V ±10% Commercial (C): Tamb = 0°C to Industrial (I): Tamb = -40°C to +70°C +85°C Conditions
Parameter Input Voltages Input Leakage Input Capacitance Output Voltages Output Leakage Output Capacitance Power Supply Current, Active Power Supply Current, Standby Note 1:
Status Logic `1' Logic `0; -- -- Logic `1' Logic `0' -- -- TTL input TTL input TTL input CMOS input
Symbol VIH VIL ILI CIN VOH VOL ILO COUT ICC ICC(S)TTL ICC(S)TTL ICC(S)CMOS
Min 2.0 -0.1 -10 -- 2.4
Max VCC+1 0.8 10 10
Units V V µA pF V V µA pF mA mA mA µA
VIN = -0.1V to VCC+1 VIN = 0V; Tamb = 25°C; f = 1 MHz IOH = -400µA IOL = 2.1 mA VOUT = -0.1V to VCC+0.1V VIN = 0V; Tamb = 25°C; f = 1 MHz f = 5 MHz (Note 1) VCC = 5.5V; CE = VIH (0°C to +70°C) CE = VIH (-40°C to +85°C) CE = VCC-0.3 to VCC+1
0.45 -10 -- -- -- 10 12 30 2 3 100
AC power supply current above 5 MHz; 1 mA/MHz.
DS11125G-page 2
© 1996 Microchip Technology Inc.
28C16A
TABLE 1-3: READ OPERATION AC CHARACTERISTICS
AC Testing Waveform: Output Load: Input Rise and Fall Times: Ambient Temperature: 28C16A-15 Parameter Address to Output Delay CE to Output Delay OE to Output Delay CE or OE High to Output Float Output Hold from CE or OE, whichever occurs first Endurance Sym Min tACC tCE tOE tOFF tOH -- -- -- -- 0 0 1M Max 150 150 70 50 -- -- Min -- -- -- 0 0 1M Max 200 200 80 55 -- -- Min -- -- -- 0 0 1M Max 250 250 100 70 -- -- ns ns ns ns ns cycles 25°C, Vcc = 5.0V, Block Mode (Note) OE = CE = VIL OE = VIL CE = VIL VIH = 2.4V; VIL = 0.45V; VOH = 2.0V; Vol = 0.8V 1 TTL Load + 100pF 20 ns Commercial (C): Tamb = 0°C to +70°0°C Industrial (I): Tamb = -40°C to +85°C 28C16A-20 28C16A-25 Units Conditions
Note: This parameter is not tested but guaranteed by characterization. For endurance estimates in a specific application, please consult the Total Endurance Model which can be obtained on our BBS or website.
FIGURE 1-1:
READ WAVEFORMS
VIH Address VIL VIH CE VIL t CE(2) Address Valid
VIH OE VIL VOH Data VOL WE VIH VIL Notes: (1) tOFF is specified for OE or CE, whichever occurs first (2) OE may be delayed up to t CE - t OE after the falling edge of CE without impact on tCE (3) This parameter is sampled and is not 100% tested t ACC t OE(2) High Z t OFF(1,3) t OH Valid Output High Z
© 1996 Microchip Technology Inc.
DS11125G-page 3
28C16A
TABLE 1-4: BYTE WRITE AC CHARACTERISTICS
AC Testing Waveform: Output Load: Input Rise/Fall Times: Ambient Temperature: Parameter Address Set-Up Time Address Hold Time Data Set-Up Time Data Hold Time Write Pulse Width Write Pulse High Time OE Hold Time OE Set-Up Time Data Valid Time Write Cycle Time (28C16A) Write Cycle Time (28C16AF) Symbol tAS tAH tDS tDH tWPL tWPH tOEH tOES tDV tWC tWC Min 10 50 50 10 100 50 10 10 -- -- -- VIH = 2.4V and VIL = 0.45V; VOH = 2.0V; VOL = 0.8V 1 TTL Load + 100 pF 20 ns Commercial (C): Tamb = 0°C to +70°C Industrial (I): Tamb = -40°C to +85°C Max -- -- -- -- -- -- -- -- 1000 1 200 Units ns ns ns ns ns ns ns ns ns ms µs Note 2 0.5 ms typical 100 µs typical Note 1 Remarks
Note 1: A write cycle can be initiated be CE or WE going low, whichever occurs last. The data is latched on the positive edge of CE or WE, whichever occurs first. 2: Data must be valid within 1000ns max. after a write cycle is initiated and must be stable at least until tDH after the positive edge of WE or CE, whichever occurs first.
FIGURE 1-2:
PROGRAMMING WAVEFORMS
VIH
Address VIL VIH CE, WE VIL t DV Data In VIH VIL t OES VIH OE VIL t OEH t DS t AS t AH t WPL t DH
DS11125G-page 4
© 1996 Microchip Technology Inc.
28C16A
FIGURE 1-3: DATA POLLING WAVEFORMS
VIH
Address VIL Address Valid t ACC t CE t WPH
Last Written Address Valid
VIH
CE VIL
VIH
WE VIL
t WPL t OE
VIH
OE VIL
t DV VIH
Data VIL Data In Valid t WC I/O7 Out True Data Out
FIGURE 1-4:
CHIP CLEAR WAVEFORMS
VIH CE VIL VH OE VIH VIH WE VIL tW = 10ms tS = tH = 1µs VH = 12.0V ±0.5V tS tW tH
TABLE 1-5:
Mode Chip Clear Extra Row Read Extra Row Write
SUPPLEMENTARY CONTROL
CE VIL VIL * OE VH VIL VIH WE VIL VIH * A9 X A9 = VH A9 = VH VCC VCC VCC VCC Data Out Data In I/OI
Note 1: VH = 12.0V±0.5V
* Pulsed per programming waveforms.
© 1996 Microchip Technology Inc.
DS11125G-page 5
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