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Part: MT28F642D20FN-804BET
Category:
Memory
-> Flash
-> 64 Mb
-> Low Power
Description: Async/page/burst Flash Memory, 4 Meg X 16, 59-ball Fbga, 0.18µm Process Technology
Company: Micron Semiconductor Products, Inc.
Datasheet: Download MT28F642D20FN-804BET datasheet File size : 28 kB
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Datasheet text preview:
4 MEG x 16 ASYNC/PAGE/BURST FLASH MEMORY
FLASH MEMORY
FEATURES
· Single device supports asynchronous, page, and burst operations · Flexible dual-bank architecture Support for true concurrent operation with zero latency Read bank a during program bank b and vice versa Read bank a during erase bank b and vice versa · Basic configuration: One hundred and thirty-five erasable blocks Bank a (16Mb for data storage) Bank b (48Mb for program storage) · VCC, VCCQ, VPP voltages 1.70V (MIN), 1.90V (MAX) VCC, VCCQ (MT28F642D18 only) 1.80V (MIN), 2.20V (MAX) VCC, and 2.25V (MAX) VCCQ (MT28F642D20 only) 1.80V (TYP) VPP (in-system PROGRAM/ERASE) 12V ±5% (HV) VPP tolerant (factory programming compatibility) · Random access time: 70ns @ 1.80V VCC1 · Burst Mode read access MAX clock rate: 54 MHz (tCLK = 18.5ns) Burst latency: 70ns @ 1.80V VCC and 54 MHz tACLK: 15ns @ 1.80V VCC and 54 MHz · Page Mode read access1 Four-/eight-word page Interpage read access: 70ns @ 1.80V Intrapage read access: 30ns @ 1.80V · Low power consumption (VCC = 2.20V) Asynchronous Read < 15mA Interpage Read < 15mA Intrapage Read < 5mA Continuous Burst Read < 10mA WRITE < 55mA (MAX) ERASE < 45mA (MAX) Standby < 50µA (MAX) Automatic power save (APS) feature Deep power-down < 25µA (MAX) · Enhanced write and erase suspend options · Accelerated programming algorithm (APA) insystem and in-factory · Dual 64-bit chip protection registers for security purposes
NOTE: 1. Data based on MT28F642D20 device.
4 Meg x 16 Async/Page/Burst Flash Memory MT28F642D18_4.p65 Rev. 4, Pub. 10/02
MT28F642D18 MT28F642D20
Low Voltage, Extended Temperature 0.18µm Process Technology
PIN ASSIGNMENT 59-Ball FBGA
1 A B C D E F G
A11
2
A8
3
VSS
4
VCC
5
VPP
6
A18
7
A6
8
A4
A12
A9
A20
CLK
RST#
A17
A5
A3
A13
A10
A21
ADV#
WE#
A19
A7
A2
A15
A14
WAIT#
A16
DQ12
WP#
A1
VCCQ
DQ15
DQ6
DQ4
DQ2
DQ1
CE#
A0
VSS
DQ14
DQ13
DQ11
DQ10
DQ9
DQ0
OE#
DQ7
VSSQ
DQ5
VCC
DQ3
VCCQ
DQ8
VSSQ
Top View (Ball Down)
NOTE: See page 7 for Ball Description Table. See page 50 for mechanical drawing.
· Cross-compatible command support Extended command set Common flash interface · PROGRAM/ERASE cycle 100,000 WRITE/ERASE cycles per block
OPTIONS
· Timing 80ns access 70ns access · Frequency 40 MHz 54 MHz · Boot Block Configuration Top Bottom · Package 59-ball FBGA (8 x 7 ball grid) · Operating Temperature Range Extended (-40ºC to +85ºC)
Part Number Example:
MARKING
-80 -70 4 5 T B FN ET
MT28F642D20FN-804 TET
1
©2002, Micron Technology, Inc.
PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE SUBJECT TO CHANGE BY MICRON WITHOUT NOTICE.
4 MEG x 16 ASYNC/PAGE/BURST FLASH MEMORY
GENERAL DESCRIPTION
The MT28F642D20 and MT28F642D18 are highperformance, high-density, nonvolatile memory solut i o n s that can significantly improve system performance. This new architecture features a twomemory-bank configuration that supports dual-bank operation with no latency. A high-performance bus interface allows a fast burst or page mode data transfer; a conventional asynchronous bus interface is provided as well. The devices allow soft protection for blocks, as readonly, by configuring soft protection registers with dedicated command sequences. For security purposes, two 64-bit chip protection registers are provided. The embedded WORD WRITE and BLOCK ERASE functions are fully automated by an on-chip write state machine (WSM). Two on-chip status registers, one for each of the two memory partitions, can be used to monitor the WSM status and to determine the progress of the program/erase task. The erase/program suspend functionality allows compatibility with existing EEPROM emulation software packages. These devices are manufactured using 0.18µm process technology. Please refer to the Micron Web site (www.micron.com/ flash) for the latest data sheet.
ARCHITECTURE AND MEMORY ORGANIZATION
The Flash devices contain two separate banks of memory (bank a and bank b) for simultaneous READ and WRITE operations, which are available in the following bank segmentation configurations: · Bank a comprises one-fourth of the memory and c o n t a i n s 8 x 4K-word parameter blocks and 31 x 32K-word blocks. · Bank b represents three-fourths of the memory, is e q u a l l y sectored, and contains 96 x 32K-word blocks. Figures 2 and 3 show the bottom and top memory organizations.
DEVICE MARKING
Due to the size of the package, Micron's standard part number is not printed on the top of each device. Instead, an abbreviated device mark comprised of a five-digit alphanumeric code is used. The abbreviated device marks are cross referenced to the Micron part numbers in Table 1.
Table 1 Cross Reference for Abbreviated Device Marks
P A R T NUMBER M T 2 8 F 6 4 2 D 2 0 F N - 7 0 5 TET M T 2 8 F 6 4 2 D 2 0 F N - 7 0 5 BET M T 2 8 F 6 4 2 D 2 0 F N - 8 0 4 TET M T 2 8 F 6 4 2 D 2 0 F N - 8 0 4 BET M T 2 8 F 6 4 2 D 1 8 F N - 7 0 5 TET M T 2 8 F 6 4 2 D 1 8 F N - 7 0 5 BET M T 2 8 F 6 4 2 D 1 8 F N - 8 0 4 TET M T 2 8 F 6 4 2 D 1 8 F N - 8 0 4 BET PRODUCT MARKING FW906 FW905 FW907 FW908 FW909 FW910 FW911 FW912 SAMPLE MARKING FX906 FX905 FX907 FX908 FX909 FX910 FX911 FX912 MECHANICAL S A M P L E MARKING FY906 FY905 FY907 FY908 FY909 FY910 FY911 FY912
4 Meg x 16 Async/Page/Burst Flash Memory MT28F642D18_4.p65 Rev. 4, Pub. 10/02
2
Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2002, Micron Technology, Inc.
4 MEG x 16 ASYNC/PAGE/BURST FLASH MEMORY
PART NUMBERING INFORMATION
Micron's low-power devices are available with several different combinations of features (see Figure 1). Valid combinations of features and their corresponding part numbers are listed in Table 2.
Figure 1 Part Number Chart
MT 2 8F 642 D 20 FN-80 4 B ET
Micron Technology Flash Family
28F = Dual-Supply Flash
Operating Temperature Range
ET = Extended (-40ºC to +85ºC)
Boot Block Starting Address
B = Bottom boot T = Top boot
Density/Organization/Banks
642 = 64Mb (4,096K x 16) bank a = 1/4; bank b = 3/4
Burst Mode Frequency
4 = 40 MHz 5 = 54 MHz
Read Mode Operation
D = Asynchronous/Page/Burst Read
Access Time
-70 = 70ns -80 = 80ns
Operating Voltage Range
18 = 1.70V1.90V 20 = 1.80V2.20V VCC 20 = 1.80V2.25V VCCQ
Package Code
FN = 59-ball FBGA (8 x 7 grid)
Table 2 Valid Part Number Combinations1
ACCESS T I M E (ns) 70 70 80 80 70 70 80 80 B O O T BLOCK STARTING ADDRESS Top Bottom Top Bottom Top Bottom Top Bottom BURST FREQUENCY (MHz) 54 54 40 40 54 54 40 40 OPERATING TEMPERATURE RANGE -40oC to +85oC -40oC to +85oC -40oC to +85oC -40oC to +85oC -40oC to +85oC -40oC to +85oC -40oC to +85oC -40oC to +85oC
P A R T NUMBER M T 2 8 F 6 4 2 D 2 0 F N - 7 0 5 TET M T 2 8 F 6 4 2 D 2 0 F N - 7 0 5 BET M T 2 8 F 6 4 2 D 2 0 F N - 8 0 4 TET M T 2 8 F 6 4 2 D 2 0 F N - 8 0 4 BET M T 2 8 F 6 4 2 D 1 8 F N - 7 0 5 TET M T 2 8 F 6 4 2 D 1 8 F N - 7 0 5 BET M T 2 8 F 6 4 2 D 1 8 F N - 8 0 4 TET M T 2 8 F 6 4 2 D 1 8 F N - 8 0 4 BET
NOTE: 1. For part number combinations not listed in this table, please contact your Micron representative.
4 Meg x 16 Async/Page/Burst Flash Memory MT28F642D18_4.p65 Rev. 4, Pub. 10/02
3
Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2002, Micron Technology, Inc.
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