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Part: DPL3519A

Category:
 Multimedia
   -> Audio
             -> Front-end/Back-end

Description: Advanced Dolby Pro Logic Processor

Company: Micronas Intermetall GmbH

Datasheet: Download DPL3519A datasheet     File size : 104 kB

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Datasheet text preview:
PRELIMINARY DATA SHEET

M I C RO N A S

DPL 3520A, DPL 3519A, DPL 3518A Dolby Pro Logic Processor Family

Edition July 31, 1997 6251-423-1PD

MICRONAS

DPL 35xxA
Contents Page 4 6 6 6 7 7 8 8 9 12 15 17 17 18 21 26 27 28 28 28 28 28 28 28 29 29 29 29 30 31 32 33 33 35 35 36 37 37 38 39 39 40 40 2 Section 1. 2. 2.1. 2.2. 2.3. 2.4. 3. 3.1. 3.2. 3.3. 3.4. 3.5. 3.5.1. 3.5.2. 3.5.3. 3.5.4. 4. 4.1. 4.2. 4.2.1. 4.2.2. 4.2.3. 4.2.4. 4.3. 5. 5.1. 5.2. 6. 6.1. 7. 8. 9. 9.1. 9.1.1. 9.1.2. 9.1.3. 9.1.4. 9.1.5. 9.1.6. 9.1.7. 9.1.8. 9.1.9. 9.1.10. Title Introduction Functional Description Features of the Analog Input Section Features of the DSP-Section Features of the Analog Output Section SCART Switches

PRELIMINARY DATA SHEET

Specifications Outline Dimensions Pin Connections and Short Descriptions Pin Configurations Pin Circuits Electrical Characteristics Absolute Maximum Ratings Recommended Operating Conditions Characteristics Measurements according to Dolby specifications, typical values I2C-Bus Interface Protocol Description Proposal for DPL I2C-Telegrams Symbols Write Telegrams Read Telegrams Examples Start-Up Sequence Audio PLL and Crystal Specifications Operation with Crystal Operation without Crystal I2S-Bus Interface I2S Bus Timing Diagram Power-up Sequence Programming the Mode Register Programming the DSP Part Summary of the DSP Control Registers Volume Channel 1 and Channel 2 Balance Channel 1 and Channel 2 Bass Channel 1 and Channel 2 Treble Channel 1 and Channel 2 Loudness Channel 1 and Channel 2 Spatial Effects Channel 1 Volume SCART Channel Channel Source Modes Channel Matrix Modes SCART Prescale Micronas

PRELIMINARY DATA SHEET

DPL 35xxA

Contents, continued Page 40 41 41 41 42 42 43 43 43 44 44 44 44 44 44 45 45 45 46 46 47 47 47 47 48 48 48 49 50 51 52 53 53 54 56 56 Section 9.1.11. 9.1.12. 9.1.13. 9.1.14. 9.1.15. 9.1.16. 9.1.17. 9.1.18. 9.1.19. 9.1.20. 9.1.21. 9.1.22. 9.1.23. 9.1.24. 9.1.25. 9.2. 9.2.1. 9.2.2. 10. 10.1. 10.2. 10.2.1. 10.2.2. 10.2.3. 10.3. 10.4. 10.5. 10.6. 10.7. 11. 12. 13. 13.1. 13.2. 14. 15. Title I2S1 and I2S2 Prescale ACB Register, Definition of the SCART-Switches and DIG_CTR_OUT Pins Beeper Mode Tone Control Equalizer Channel 1 Surround Decoder Modes Surround Reproduction Modes Surround Source Modes Surround Source Matrix Modes Surround Delay Surround Manual Input Balance Surround Input Balance Mode Surround Spatial Effect Panorama Sound Effect Surround Reverberation Summary of Readable Registers Quasi Peak Detector Digital Input Level Register Further Explanations and Application Hints Overview of the Surround Decoder and Reproduction Modes Useful Combinations of the Surround Decoder and Reproduction Modes Useful Combinations with the ADAPTIVE Surround Decoder Mode Useful Combinations with the PASSIVE Surround Decoder Mode Useful Combinations with the EFFECT Surround Decoder Mode Further Notes Input and Output Levels for Dolby Pro Logic Operation Dolby Qualification Phase Relationship of Outputs Minimum Control Transmissions for DPL 3520A Application Principle of the DPL 3520A Application Circuit Diagram of the DPL 3520A Dolby Pro Logic Processor Family DPL 3518A: Basic Dolby Pro Logic Coprocessor for the MSP Family DPL 3519A: Advanced Dolby Pro Logic Coprocessor for the MSP Family IC Failure Report Data Sheet History

DPL 3520A Dolby*) Pro Logic Processor Note: This document contains information on a new product. Specifications and information herein are subject to change without notice. *) "Dolby", the double-D symbol and "Pro Logic" are trademarks of Dolby Laboratories Licensing Corporation. Micronas 3

DPL 35xxA
Dolby Pro Logic Processor Family 1. Introduction The DPL 35xxA processor family is designed to decode Dolby encoded surround sound. The ICs integrate the complete Dolby Surround Pro Logic decoding on chip without any necessary external circuitry. This data sheet describes the features and specifications of all members of the IC family. The DPL 3518A is designed as a coprocessor to one of the TV sound processing ICs of the MSP 34xx family. It only has digital interfaces. No analog input and output interfaces are supported. The DPL 3519A is also designed as a coprocessor to the MSP family but has analog output channels in addition to the features of the DPL 3518A. Together with the MSP, a TV set with up to six outputs (L, R, C, SUB, SL, SR) can be developed together with headphones and several line outputs. The DPL 3520A is designed as a stand-alone Dolby Surround Pro Logic decoder. An on-chip A/D converter digitizes analog inputs. The DPL 3520A can also be used as a coprocessor to the MSP 34xx single-chip Multistandard Sound Processor family. This gives another A/D input pair to the system. The ICs of the DPL family are pin-compatible to the MSP ICs. This speeds up PCB development for customers using MSPs. The software interface is largely the same as for the MSP 3400C. Volume, tone controls, matrixes and switches use the same registers and values. Thus, the standard MSP 3400C controlling software can be used to control the DPL 3520A. Little overhead is needed to control the Dolby Pro Logic part of the IC.

PRELIMINARY DATA SHEET

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Micronas

PRELIMINARY DATA SHEET

DPL 35xxA

DPL 3518A Integrated Functions: ­ ­ ­ ­ ­ ­ ­ ­ ­ ­ ­ ­ ­ ­ ­ ­ ­ Full Dolby Surround Pro Logic Adaptive Matrix Pseudo-surround mode for signals not encoded in Dolby Surround PANORAMA sound mode (3-D Surround sound via 2 loudspeakers) Noise sequencer Automatic input balance control 7 kHz low-pass filter 100 Hz low-pass filter for subwoofer Modified Dolby B-type NR decoder 30 ms surround delay according to table created by Dolby Laboratories (1 ms steps) 2 I2S input channels (e.g. MSP and DRPA) 2 I2S output channels, freely programmable with sound channels L/R (resp. L)C/R)C), C/S, Sub or I2S input Mode control: normal/phantom/wide/three channel/center off/panorama sound/stereo bypass Surround matrix mode control: adaptive/passive/effect Additional surround basewidth effect Reverberation of surround signals 2 digital input/output pins 1 digital input pin

DPL 3519A Integrated Functions (in Addition to all DPL 3518A Functions): ­ ­ ­ ­ ­ ­ ­ ­ Master volume control in dB units Level Trim for L, C, R, S in dB units, $12 dB Identical treble/bass/loudness function for L, C, R, S 5-band equalizer for C channel Separate volume control for two surround outputs Additional line output for HIFI receiver connection (SCART output). Volume for this output is in dB units. 3 pairs of D/A converters Scart switches

DPL 3520A Integrated Functions (in Addition to all DPL 3518A and DPL 3519A Functions) ­ 1 pair of A/D converters ­ Note: the 5-band equalizer for C channel can only be used in coprocessor mode. No parallel AD input possible.

DPL 3520/19/18A Applications: Dolby Pro Logic Surround System in television sets in satellite receivers in video recorders

Micronas

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