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Part: M65824FP
Category:
Multimedia
-> Audio
-> Processors
Description: CD Player Digital Processor With Built-in DAC
Company: Mitsubishi Electronics America, Inc.
Datasheet: Download M65824FP datasheet File size : 1522 kB
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Datasheet text preview:
M TS ISHSHI SOUND PROCESSOR MITSIUBUBII SOUND PROCESSOR ICsICs
M65 F 4F M6582482P P SIGNAL PROCESSOR FOR CD PLAYER WITH BUILT-IN D/AD/A SIGNAL PROCESSOR FOR CD PLAYER WITH BUILT-IN
DESCRIPTION The M65824FP is a CMOS IC for playback of a compact disk (CD-DA). It is equipped with memory, non-adjustment PLL, 4fs digital filter and D-A converter. The M65824FP can configure a compact CD-DA system.
FEATURES
·Non-adjustment EFM-PLL with wide lock-range (built-in VCO) ·Jitter margin ± 8 frames ·Operatable CLV servo command ·Attenuation (-12 dB) ·Built-in 4fs digital filter ·Built-in digital de-emphasis circuit ·Built-in D-A converter ·Compact set by the adoption of a compact package ·Built-in analog LPF ·External D-A mode
RECOMMENDED OPERATING CONDITIONS
Supply voltage range (interface)...... DVDD = 2.7 to 5.5V Supply voltage range (internal circuit, analog) ... DSPS, AVDD = 2.7 to 3.3V Rated supply voltage (interface).......... DVDD = 5.0V Rated supply voltage (internal circuit, analog) ..... DSPS, AVDD = 3.0V Rated power consumption........ 100 mW
Outline 42P2R-A
0.8mm pitch 450mil SSOP (8.4mm x 17.5mm x 2.0mm)
SYSTEM CONFIGURATION M65824FP
SUBCODE INTERFACE Display
M
OPTICAL PICK-UP
RF-AMP PICK-UP SERVO AUTO ADJUSTMENT
PLL SLICER
EMF DE-MODULATOR
INTER POLATION
DEEMP
PLL CLK OSC CLK 18KSRAM CLV DIGITAL SERVO ECC C1:2error C2:2error MCU I/F
4FS DIGITAL FILTER
MOTOR DRIVER
D/A
L R
SYSTEM CONTROL MICROPROCESSOR
MITSUBISHI ELECTRIC
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MITSUBISHI SOUND PROCESSOR ICs
M65824FP
SIGNAL PROCESSOR FOR CD PLAYER WITH BUILT-IN D/A
BUILT-IN FUNCTIONS
·D/A converter ·Memory ·PLL block ·64fs 1 bit D-A converter ·S/N:74dB (typ.)
AVSS 1 WDCK 2 LOCK/DRD 3 CKSEL 4 ACLRB 5 C423 6 C846 7 XI 8 DVSS 9 XO 10 TEST 11 SBCO 12 SCCK 13 SYCLK 14 EFFK 15 KILLB 16 EST1 17 EST2 18 HF 19 TLC 20 LPF 21 42 AVDD 41 IREF 40 RNEG/LRCK 39 ROUT/DSCK 38 LNEG/WDCK 37 LOUT/DO 36 AMPREF 35 CGREF 34 EXP2 33 EXP1 32 MLAB 31 MSD 30 MCK 29 PWM2 28 PWM1 27 PWM 26 SCAND 25 CRCF 24 SBQS 23 DSPS 22 DVDD
PIN CONFIGURATION (TOP VIEW)
·Built-in 18K SRAM ·Jitter margin ± 8 frames ·Built-in non-adjustment VCO (Bit clock reproduction) · Non-adjustment slice level control
·EFM demodulator
·EFM modulation ·Frame sync detection/protection and insertion ·Frame monitor output
·Subcode modulator
·Modulation of subcodes P to W. serial output (conforming to EIJA CP-309) ·Subcode Q register ·CRC check ·Subcode sync signal output (S0/S1)
·CIRC block
·Emphasis detection, built-in deemphasis control ·C1: double correction, C2: double correction ·Unscramble ·De-interleave
·Interpolation processing unit
·Error monitor output ·Average value interpolation and prevalue hold
Outline 42P2R-A ·D-A interface ·Digital filter ·De-emphasis block
·Mute control ·Quadruple over sampling I I R type filter ·Bi-primary I I R filter ·Emphasis detection/automatic operation
·CLV servo block
·PWM output ·Reduced disk rotation detection output
·Microcomputer I/F block
·CLV servo control command ·Mute control ·-12 dB attenuation ·Subcode Q register interface
MITSUBISHI ELECTRIC
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MITSUBISHI SOUND PROCESSOR ICs
M65824FP
SIGNAL PROCESSOR FOR CD PLAYER WITH BUILT-IN D/A
PIN DESCRIPTION
Pin No.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42
Symbol AVSS WDCK LOCK/DRD CKSEL ACLRB C423 C846 XI DVss XO TEST SBCO SCCK SYCLK EFFK KILLB EST1 EST2 HF TLC LPF DVDD DSPS SBQS CRCF SCAND PWM PWM1 PWM2 MCK MSD MLAB EXP1 EXP2 CGREF AMPREF LOUT/DO LNEG/WDCK ROUT/DSCK RNEG/LRCK IREF AVDD
I/O O O I I O O I O I O I O O O O O I O I/O O O O O O O I I/O I I I I I O O O O I -
Function Analog system GND Word clock output: f=88.2kHz Sync status/reduced disk rotation detection output System clock select input, "L": 8.4672 MHz/"H": 16.9344 MHz System reset input: reset="L" Crystal system 4.2336 MHz clock output Crystal system 8.4672 MHz clock output Crystal oscillator input (built-in feedback resistance) CKSEL="L": 8.4672MHz/CKSEL="H": 16.9344MHz Digital system GND Crystal oscillator output Shipment test pin: For test="H" Subcode serial output Subcode read clock input Frame sync output: Lock="H" .. PLL system frame clock output: duty=50% Digital silence output: Silence="L" open drain output Error status output 1: at C1 error detection="H" Error status output 2: at C2 error detection="H" Playback signal input Slice level control output PLL loop filter connection terminal Power supply to I/O block Power supply to internal logic circuit Subcode Q register read interrupt signal: Read enable: "L" CRC result of subcode Q: CRC OK="H" Subcode sync signal output: Synchronization="H" Disk motor drive PWM output (both sides) Disk motor drive PWM output 1 (acceleration side) Disk motor drive PWM output 2 (deceleration side) Microcomputer I/F shift lock Microcomputer I/F serial data I/O Microcomputer I/F latch clock (built-in 22k pull-up resistance) Additional microcomputer input port 1 (built-in 4.7k pull-up resistance) Additional microcomputer input port 2 (built-in 4.7k pull-up resistance) Current source reference current input pin for LPF Operation amplifier reference voltage setting pin for LPF L-ch audio signal output/serial data output (in external D-A mode) L-ch current source output/word clock output (in external D-A mode) R-ch audio signal output/data shift clock output (in external D-A mode) R-ch current source output/L-R clock output (in external D/A mode) Detection/PLL circuit reference current input Analog system power supply
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