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Details, datasheet, quote on part number:V437316S04VTG-75-01
 
 
Part:V437316S04VTG-75-01
Category:Memory => DRAM => SDR SDRAM => Modules => 128 MB
Description:3.3 Volt 16M X 72 High Performance Unbuffered Ecc Sdram Module, 168 Pin Dimm
Company:Mosel-Vitelic
Datasheet:Download V437316S04VTG-75-01 datasheet   File size : 347 kB
Request For quote:  Find where to buy V437316S04VTG-75-01
 



Datasheet text preview:
V437316S04V 3.3 VOLT 16M x 72 HIGH PERFORMANCE UNBUFFERED ECC SDRAM MODULE
PRELIMINARY
CILETIV LESOM
Features
V437316S04V Rev. 1.0 December 2001
Description
The V437316S04V memory module is organized 16,777,216 x 72 bits in a 168 pin dual in line memory module (DIMM). The 16M x 72 memory module uses 9 Mosel-Vitelic 16M x 8 SDRAM. The x72 modules are ideal for use in high performance computer systems where increased memory density and fast access times are required.
s 168 Pin U nbuffered 16,777,216 x 72 bit Oganization SDRAM ECC DIMMs s Utilizes High Performance 128 Mbit, 16M x 8 SD RAM in TSOPII-54 Packages s Fully PC Board Layout Compatible to INTEL'S Rev 1.0 Module Specification s Single +3.3V (± 0.3V) Power Supply s Programmable CAS Latency, Burst Length, and Wrap Sequence (Sequential & Interleave) s Auto Refresh (CBR) and Self Refresh s All Inputs, Outputs are LVTTL Compatible s 4096 Refresh Cycles every 64 ms s Serial Present Detect (SPD) s SD RAM Performance
Part N umber
V437316S04V XTG-75PC
Speed G rade
-75PC, CL=2,3 (133 MHz) -75, CL=3 (133 MHz) -10PC, CL=2,3 (100 MHz)
Configuration
16M x 72
V437316S04V XTG-75
16M x 72
V437316S04V XTG-10PC
16M x 72
V437316S04VTG-75-01
1
V437316S04V
CILETIV LESOM
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Front VSS I/O1 I/O2 I/O3 I/O4 VCC I/O5 I/O6 I/O7 I/O8 I/O9 VSS I/O10 I/O11 I/O12 I/O13 I/O14 VCC I/O15 I/O16 CB0 CB1 VSS NC NC VCC WE DQM 0 Pin 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56
Pin Configurations (Front Side/Back Side)
Front DQM 1 CS0 DU VSS A0 A2 A4 A6 A8 A10(AP) BA1 V CC V CC CLK0 VSS DU CS2 DQM 2 DQM 3 DU V CC NC NC CB2 CB3 VSS I/O17 I/O18 Pin 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 Front I/O19 I/O20 V CC I/O21 NC DU CKE 1 V SS I/O22 I/O23 I/O24 V SS I/O25 I/O26 I/O27 I/O28 V CC I/O29 I/O30 I/O31 I/O32 V SS CLK2 NC WP S DA SC L V CC P in 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 Back VSS I/O33 I/O34 I/O35 I/O36 VCC I/O37 I/O38 I/O39 I/O40 I/O41 VSS I/O42 I/O43 I/O44 I/O45 I/O46 VCC I/O47 I/O48 CB 4 CB 5 VSS NC NC VCC CAS DQM4 Pin 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 Back DQM 5 CS1 RAS VSS A1 A3 A5 A7 A9 BA0 A 11 VCC CLK1 NC VSS CKE0 CS3 DQM 6 DQM 7 DU VCC NC NC CB6 CB7 VSS I/O49 I/O50 Pin 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 Back I/O51 I/O52 VCC I/O53 NC DU NC VSS I/O54 I/O55 I/O56 VSS I/O57 I/O58 I/O59 I/O60 VCC I/O61 I/O62 I/O63 I/O64 VSS CLK3 NC SA0 SA1 SA2 VCC
Pin Names
A0 ­ A1 1 I/O1­I/O64 RAS CAS WE BA0, BA1 CKE0 , CKE1 CS0 ­ CS3 CLK0­CLK3 DQM 0­DQM 7 VCC VSS SCL Address Inputs Data Inputs/Outputs Row Address Strobe Column Address Strobe Read/Write Input Bank Selects Clock Enable Chip Select Clock Input Data Mask Power (+3.3 Volts) Ground Clock for Presence Detect
SDA SA0­A2 CB0­CB7 NC DU
Serial Data OUT for Presence Detect Serial Data IN for Presence Detect Check Bits (x72 Organization) No Connection Don't Use
V437316S04V Rev. 1.0 December 2001
2
V437316S04V
CILETIV LESOM
V
MOSEL VITELIC MANUFACTURED
Part Number Information
4
3
73
16
S
0
4
V
X
T
G - XX
SPEED 75PC = PC133 CL3,2 75 = PC133 CL3 10PC = PC133 CL3,2 L EAD FI NISH G = GOLD
SD RAM 3.3V WIDTH DEPTH 168 PIN Unbu ffered DIMM X8 COMPONENT REFRESH RATE 4K
COMPONENT PACKAGE, T = TSOP COMPONENT A=0. 17u B=0.14u REV L EVEL L VTTL 4 BANKS
Block Diagram
WE CS0 DQM0 I/O1­I/O8 10 DQM1 I/O9­I/O16 10 CB0­7 10 CS2 DQM2 I/O17­I/O24 10 DQM3 I/O25­I/O32 10 E2PROM SPD (256 WORD X 8 BITS) SCL0 SA2 SA1 SA0 SDA WP
47K
DQM WE I/O1­I/O8 DQM WE I/O1­I/O8 DQM WE I/O1­I/O8
CS D0 CS D1 CS D8
DQM4 I/O40­I/O33 10 DQM5 I/O48­I/O41 10
DQM WE I/O1­I/O8 DQM WE I/O1­I/O8
CS D4 CS D5
WE DQM I/O1­I/O8 WE DQM I/O1­I/O8
CS D2 CS D3
DQM6 I/O49­I/O56 10 DQM7 I/O57­I/O64 10 CKE0 RAS CAS WE A(11:0) BA0, BA1
WE DQM I/O1­I/O8 WE DQM I/O1­I/O8
CS D6 CS D7
CKE: SDRAM D0-D8 RAS: SDRAM D0-D8 CAS: SDRAM D0-D8 WE: SDRAM D0-D8 A(11:0): SDRAM D0-D8 BA0, BA1: SDRAM D0-D8 D0-D8 C0-C15 D0-D8
CLOCK WIRING CLOCK INPUT CLK0 CLK1 CLK2 CLK3 LOAD 5 SDRAMS Termination 4 SDRAMS +3.3pF Cap Termination
VCC VSS
V437316S04VTG-75-03
V437316S04V Rev. 1.0 December 2001
3