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Details, datasheet, quote on part number:V437464C24VXTG-75
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Datasheet text preview:
V437464C24V 3.3 VOLT 64M x 72 HIGH PERFORMANCE PC133 REGISTERED PLL ECC SDRAM MODULE
Description
PRELIMINARY
s 168 Pin R egistered ECC 67,108,864 x 72 bit Oganization SDRAM Modules s Utilizes High Performance 64M x 4 SDRAM in TSOPII-54 Packages s Fully PC Board Layout Compatible to INTEL'S Rev 1.2 Module Specification s Single +3.3V (± 0.3V) Power Supply s Programmable CAS Latency, Burst Length, and Wrap Sequence (Sequential & Interleave) s Auto Refresh (CBR) and Self Refresh s All Inputs, Outputs are LVTTL Compatible s 8192 Refresh Cycles every 64 ms s Serial Present Detect (SPD) s SDRAM Performance
K ey Com ponent Tim ing Param eters
tCK tAC tAC Clock Frequency (max.) Clock Access Time CAS Latency = 3 Clock Access Time CAS Latency = 2
CILETIV LESOM
Features
Frequency
V437464C24V 133 MHz (PC ) V437464C24V 1 3 3 M Hz V437464C24V 100 MHz (PC )
V437464C24V Rev.1.0 January 2002
The V437464C24V memory module is organized 67,108,864 x 72 bits in a 168 pin dual in line memory module (DIMM). The 64M x 72 registered DIMM uses 18 Mosel-Vitelic 64M x 4 ECC SDRAM. The x72 registered modules are ideal for use in high performance computer systems where increased memory density and fast access times are required.
-7PC
143 5.4 5.4
-7
143 5.4 6
-8PC
125 6 6
Units
MHz ns ns
s Module Frequency vs AC Parameter
CL (CAS Latency)
2
tRCD
2
tRP
2
tRC
8
Uni t
CL K
3
3
3
8
CL K
2
2
2
7
CL K
1
V437464C24V
Front DQM 1 CS0 DU VSS A0 A2 A4 A6 A8 A10(AP) BA1 V CC V CC CLK 0 VSS DU CS2 DQM 2 DQM 3 DU V CC NC NC CB2 CB3 VSS I/O17 I/O18 Pin 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 Front I/O19 I/O20 V CC I/O21 NC DU CKE1 * VSS I/O22 I/O23 I/O24 VSS I/O25 I/O26 I/O27 I/O28 V CC I/O29 I/O30 I/O31 I/O32 VSS CLK2* NC WP S DA SC L V CC Pin 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 Back VSS I/O33 I/O34 I/O35 I/O36 VCC I/O37 I/O38 I/O39 I/O40 I/O41 VSS I/O42 I/O43 I/O44 I/O45 I/O46 VCC I/O47 I/O48 CB 4 CB 5 VSS NC NC VCC CAS DQM4 Pin 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 Back DQM 5 CS1 RAS VSS A1 A3 A5 A7 A9 BA0 A11 VCC CLK1* A12 VSS CKE0 CS3 DQM 6 DQM 7 DU VCC NC NC CB6 CB7 VSS I/O49 I/O50 Pin 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 Back I/O51 I/O52 VCC I/O53 NC DU REGE VSS I/O54 I/O55 I/O56 VSS I/O57 I/O58 I/O59 I/O60 VCC I/O61 I/O62 I/O63 I/O64 VSS CLK3* NC SA0 SA1 SA2 VCC
CILETIV LESOM
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Front VSS I/O1 I/O2 I/O3 I/O4 VCC I/O5 I/O6 I/O7 I/O8 I/O9 VSS I/O10 I/O11 I/O12 I/O13 I/O14 VCC I/O15 I/O16 CBO CB1 VSS NC NC VCC WE DQM 0 Pin 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56
Pin Configurations (Front Side/Back Side)
No tes:
* These pins are not used in this module.
Pin Names
A0A12 I/O1I/O64 RAS CAS WE BA0, BA1 CKE0 CS0 , CS2 CLK0CLK3 DQM 0DQM 7 VCC VSS SCL Address Inputs Data Inputs/Outputs Row Address Strobe Column Address Strobe Read/Write Input Bank Selects Clock Enable Chip Select Clock Input Data Mask Power (+3.3 Volts) Ground Clock for Presence Detect CB0CB4 NC R E GE DU SA0A2 SDA Serial Data OUT for Presence Detect Serial Data IN for Presence Detect Check Bits (x72 Organization) No Connection Register Enable Don't Use
V437464C24V Rev. 1.0 January 2002
2
V437464C24V
Block Diagram
RCS0 RQM0 I/O1I/O4 CS DQM I/O1I/O8 D0 CS DQM I/O1I/O8 D1 CS DQM I/O1I/O8 D2 CS DQM I/O1I/O8 D3 CS RQM4 I/O33I/O36 CS DQM I/O1I/O8 D9 CS DQM I/O1I/O8 D10 CS DQM I/O1I/O8 D11 CS DQM I/O1I/O8 D12 CS
I/O13I/O16
RQM2 I/O17I/O20
I/O21I/O24
RQM3 I/O25I/O28
I/O29I/O32
CILETIV LESOM
MOSEL VITELIC MANUFACTURED
Module Part Number Information
V
4
3
74
64
C
2
4
V
X
T
G - XX
SPEED 75PC= PC133 CL2 75 = PC133 CL3 10PC= PC100 CL2
SDRAM 3.3V WIDTH DEPTH 168 PIN REGISTERED DIMM X4 COMPONENT REFRESH RATE 8K
LEAD FINISH G = GOLD COMPONENT PACKAGE, T = TSOP COMPONENT A=0.17um REV LEVEL B=0 .14um LVTTL 4 BANKS
10
10
I/O5I/O8
10
I/O37I/O40
10
RQM1 I/O9I/O12
10
RQM5 I/O41I/O44
10
10
I/O45I/O48
10
RAS CAS
CB1CB3 RCS2
10
DQM I/O1I/O8 D4
CB4CB7
10
DQM I/O1I/O8 D13
WE CKE0 DQM0DQM7
R E G I S T E R
RRAS RCAS RWE
D0D17 D0D17 D0D17
R0CKE0, R1CKE0 RDQM0RDQM7 RC0, RCS2 RA0RA12 RBA0, RBA1 D0D17 D0D17
10
CS DQM I/O1I/O8 D5 CS
RQM6 I/O49I/O52
10
CS DQM I/O1I/O8 D14 CS
CS0, CS A0A12 BA0, BA1
10
DQM I/O1I/O8 D6 CS DQM I/O1I/O8 D7 CS
I/O53I/O56
10
DQM I/O1I/O8 D15 REGE CS DQM I/O1I/O8 D16 CS
VDD 10K
10
RQM7 I/O57I/O60
PLL CLK 10K CLK1CLK3 12pF
CLK0 10K PLL 12pF D0D17
10
10
DQM I/O1I/O8 D8
I/O61I/O64
10
DQM I/O1I/O8 D17
V437464C24V Rev. 1.0 January 2002
3
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