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Details, datasheet, quote on part number:V53C317405A-50T
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Datasheet text preview:
MOSEL VITELIC
V53C317405A 4M X 4 EDO PAGE MODE CMOS DYNAMIC RAM
V53C317405A
Max. RAS Access Time, (tRAC) Max. Column Address Access Time, (tCAA) Min. Extended Data Out Page Mode Cycle Time, (tPC) Min. Read/Write Cycle Time, (tRC)
50
50 ns 25 ns 20 ns 84 ns
60
60 ns 30 ns 25 ns 104 ns
Features
s 4M x 4-bit organization s EDO Page Mode for a sustained data rate of 50 MHz s RAS access time: 50, 60, 70 ns s Low power dissipation s Read-Modify-Write, RAS-Only Refresh, CAS-Before-RAS Refresh, Hidden Refresh s Refresh Interval: 2048 cycles/32 ms s Available in 24/26-pin 300 mil SOJ, and 24/26-pin 300 mil TSOP-II s Single +3.3 V ±10% Power Supply s TTL Interface
Description
The V53C317405A is a 4,194,304 x 4 bit highperformance CMOS dynamic random access memory. The V53C317405A offers Page mode operation with Extended Data Output. The V53C317405A has a symmetric address, 11-bit row and 11-bit column. All inputs are TTL compatible. EDO Page Mode operation allows random access up to 2048 x 4 bits, within a page, with cycle times as short as 20ns. These features make the V53C317405A ideally suited for a wide variety of high performance computer systems and peripheral applications.
Device Usage Chart
Operating Temperature Range
0°C to 70°C
Package Outline K
·
Access Time (ns) 50
·
Power Std.
·
T
·
60
·
Temperature Mark
Blank
V53C317405A Rev. 0.2 September 1998
1
MOSEL VITELIC
24/26 Pin Plastic SOJ /TSOP-II PIN CONFIGURATION Top View
VCC I/O1 I/O2 RE W NS A C A10 A0 A1 A2 A3 VCC
1 2 3 4 5 6 8 9 10 11 12 13 26 25 24 23 22 21 19 18 17 16 15 14
511740502-02
V53C317405A
Pin Names
A0A10 RAS CAS Row, Column Address Inputs Row Address Strobe Column Address Strobe Write Enable Output Enable Data Input, Output +3.3V Supply 0V Supply No Connect
VSS I/O4 I/O3 O CAS AE
9
WE OE I/O1I/O4 VCC VSS NC
A8 A7 A6 A5 A4 VSS
Description SOJ TSOP-II
Pkg. K T
Pin Count 24/26 24/26
V53C317405A Rev. 0.2 September 1998
2
MOSEL VITELIC
Operating temperature range .........0 to 70 °C Storage temperature range ...... -55 to 150 °C Input/output voltage .... -0.5 to min (VCC+0.5, 4.6) V Power supply voltage .......-1.0V to 4.6V Power dissipation ......... 0.5 W Data out current (short circuit) .... 50 mA
*Note: Operation above Absolute Maximum Ratings can adversely affect device reliability.
V53C317405A
Capacitance*
TA = 25°C, VCC = 3.3 V ± 10%, VSS = 0 V, f = 1 MHz
Symbol CIN1 CIN2 COUT Parameter Address Input RAS, CAS, WE, OE Data Input/Output Min. -- -- -- Max. 5 7 7 Unit pF pF pF
Absolute Maximum Ratings*
*Note: Capacitance is sampled and not 100% tested.
Block Diagram
4096 x 4
I/O1 I/O2 I/O3 I/O4
Data In Buffer WE CAS 4
Data Out Buffer 4
OE
No. 2 Clock Generator
11 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10
Column Address Buffers (11)
11
Column Decoder
Refresh Controller Sense Amplifier I/O Gating Refresh Counter (11) 11 11 Row Address Buffers (11) 11 Row Decoder 2048 Memor y Array 2048 x 2048 x 4 2048 x4
4
RAS
No. 1 Clock Generator
Voltage Down Generator
VCC
511740500-03
VCC (internal)
V53C317405A Rev. 0.2 September 1998
3
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