|
Details, datasheet, quote on part number:V53C318165A60
| |
Datasheet text preview:
MOSEL VITELIC
V53C318165A 3.3 VOLT 1M X 16 EDO PAGE MODE CMOS DYNAMIC RAM
HIGH PERFORMANCE
Max. RAS Access Time, (tRAC) Max. Column Address Access Time, (tCAA) Min. Extended Data Out Page Mode Cycle Time, (tPC) Min. Read/Write Cycle Time, (tRC)
50
50 ns 25 ns 20 ns 84 ns
60
60 ns 30 ns 25 ns 104 ns
70
70 ns 35 ns 30 ns 124 ns
Features
s 1M x 16-bit organization s EDO Page Mode for a sustained data rate of 50 MHz s RAS access time: 50, 60, 70 ns s Dual CAS Inputs s Low power dissipation s Read-Modify-Write, RAS-Only Refresh, CAS-Before-RAS Refresh, Hidden Refresh, and Self Refresh. s Refresh Interval: 1024 cycles/16 ms s Available in 42-pin 400 mil SOJ and 50/44-pin 400 mil TSOP-II s Single +3.3 V ±0.3 V Power Supply s TTL Interface
Description
The V53C318165A is a 1048576 x 16 bit highperformance CMOS dynamic random access memory. The V53C318165A offers Page mode operation with Extended Data Output. The V53C318165A has an symmetric address, 10-bit row and 10-bit column. All inputs are TTL compatible. EDO Page Mode operation allows random access up to 1024 x 16 bits, within a page, with cycle times as short as 20ns. These features make the V53C318165A ideally suited for a wide variety of high performance computer systems and peripheral applications.
Device Usage Chart
Operating Temperature Range
0°C to 70 °C
Package Outline K
·
Access Time (ns) 50
·
Power 70
·
T
·
60
·
Std.
·
Temperature Mark
Blank
V53C318165A Rev. 1.0 January 1998
1
MOSEL VITELIC
42-Pin Plastic SOJ PIN CONFIGURATION Top View
VCC I/O1 I/O2 I/O3 I/O4 VCC I/O5 I/O6 I/O7 I/O8 NC NC WE RAS NC NC A0 A1 A2 A3 VCC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22
311816500-02
V53C318165A
50/44-Pin Plastic TSOP-II PIN CONFIGURATION Top View
VCC I/O1 I/O2 I/O3 I/O4 VCC I/O5 I/O6 I/O7 I/O8 NC
1 2 3 4 5 6 7 8 9 10 11 50 49 48 47 46 45 44 43 42 41 40
VSS I/O16 I/O15 I/O14 I/O13 VSS I/O12 I/O11 I/O10 I/O9 NC LCAS UCAS OE A9 A8 A7 A6 A5 A4 VSS
VSS I/O16 I/O15 I/O14 I/O13 VSS I/O12 I/O11 I/O10 I/O9 NC
NC NC WE RAS NC NC A0 A1 A2 A3 VCC
15 16 17 18 19 20 21 22 23 24 25
36 35 34 33 32 31 30 29 28 27 26
311816500-03
NC LCAS UCAS OE A9 A8 A7 A6 A5 A4 VSS
Pin Names
A0A9 RAS UCAS LCAS WE OE I/O1I/O16 VCC VSS NC Row, Column Address Inputs Row Address Strobe Column Address Strobe/Upper Byte Control Column Address Strobe/Lower Byte Control Write Enable Output Enable Data Input, Output +3.3V Supply 0V Supply No Connect
Description SOJ TSOP-II
Pkg. K T
Pin Count 42 50
V53C318165A Rev. 1.0 January 1998
2
MOSEL VITELIC
Absolute Maximum Ratings*
Operating temperature range .........0 to 70 °C Storage temperature range ...... -55 to 150 °C Soldering temperature ..........260 °C Soldering time.........10 s Input/output voltage .... -0.5 to min (VCC+0.5, 4.6) V Power supply voltage ......-0.5V to 4.6 V Power dissipation ......... 0.5 W Data out current (short circuit) .... 50 mA
*Note: Operation above Absolute Maximum Ratings can adversely affect device reliability.
V53C318165A
Capacitance*
Symbol CIN1 CIN2 COUT
TA = 25°C, VCC = 3.3 V ± 0.3 V, VSS = 0 V, f = 1 MHz
Parameter Address Input RAS, UCAS, LCAS, WE, OE Data Input/Output Min. -- -- -- Max. 5 7 7 Unit pF pF pF
*Note: Capacitance is sampled and not 100% tested.
Block Diagram
1024 x 16
OE WE UCAS LCAS RAS
RAS CLOCK GENERATOR
CAS CLOCK GENERATOR
WE CLOCK GENERATOR
OE CLOCK GENERATOR
VCC VSS
DATA I/O BUS COLUMN DECODERS
Y0Y9
I/O 1 I/O2 I/O3 I/O4 I/O 5 I/O6 I/O7
SENSE AMPLIFIERS REFRESH COUNTER
1024 x 16 12 A0 A1
I/O BUFFER
I/O8 I/O 9 I/O10 I/O11
ADDRESS BUFFERS AND PREDECODERS
ROW DECODERS
X0 X9
1024
· · ·
A8 A9
MEMORY ARRAY 1024 x 1024 x 16
I/O12 I/O 13 I/O14 I/O15 I/O16
311816500-04
V53C318165A Rev. 1.0 January 1998
3
|
|
