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Details, datasheet, quote on part number:V53C364165A
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Datasheet text preview:
MOSEL VITELIC
V53C364165A 3.3 VOLT 4M X 16 EDO PAGE MODE CMOS DYNAMIC RAM
V53C364165A
Max. RAS Access Time, (tRAC) Max. Column Address Access Time, (tCAA) Min. Extended Data Out Page Mode Cycle Time, (tPC) Min. Read/Write Cycle Time, (tRC)
40
40 ns 20 ns 16 ns 69 ns
50
50 ns 25 ns 20 ns 84 ns
60
60 ns 30 ns 25 ns 104 ns
Features
s 4M x 16-bit organization s EDO Page Mode for a sustained data rate of 63 MHz s RAS access time: 40, 50, 60 ns s Dual CAS Inputs s Low power dissipation s Read-Modify-Write, RAS-Only Refresh, CAS-Before-RAS Refresh, Hidden Refresh s Refresh Interval: 8192 cycles/128 ms s Self refresh (L-version only) s Available in 50-pin 400 mil TSOP-II s Single +3.3 V ±0.3 V Power Supply s LVTTL Interface
Description
The V53C364165A is a 4,194,304 x 16 bit highperformance CMOS dynamic random access memory. The V53C364165A offers Page mode operation with Extended Data Output. The V53C364165A has an symmetric address, 13-bit row and 9-bit column. All inputs are TTL compatible. EDO Page Mode operation allows random access up to 512 x 16 bits, within a page, with cycle times as short as 16 ns. These features make the V53C364165A ideally suited for a wide variety of high performance computer systems and peripheral applications.
Device Usage Chart
Operating Temperature Range
0°C to 70°C
Package Outline T
·
Access Time (ns) 40
·
Power 60
·
50
·
Std.
·
L
·
Temperature Mark
Blank
V53C364165A Rev. 0.2 September 1998
1
MOSEL VITELIC
50 Pin Plastic TSOP-II PIN CONFIGURATION Top View
VCC I/O1 I/O2 I/O3 I/O4 VCC I/O5 I/O6 I/O7 I/O8 NC VCC WE RAS NC NC NC NC A0 A1 A2 A3 A4 A5 VCC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26
316516500-02
V53C364165A
Pin Names
A0A12 RAS Row, Column Address Inputs Row Address Strobe Column Address Strobe/Upper Byte Control Column Address Strobe/Lower Byte Control Write Enable Output Enable Data Input, Output +3.3V Supply 0V Supply No Connect
VSS I/O16 I/O15 I/O14 I/O13 VSS I/O12 I/O11 I/O10 I/O9 NC VSS LCAS UCAS OE NC NC A12 A11 A10 A9 A8 A7 A6 VSS
UCAS LCAS WE OE I/O1I/O16 VCC VSS NC
Description TSOP-II
Pkg. T
Pin Count 50
Operating temperature range .........0 to 70 °C Storage temperature range ...... -55 to 150 °C Soldering temperature ..........260 °C Soldering time.........10 s Input/output voltage .... -0.5 to min (VCC+0.5, 4.6) V Power supply voltage ......-0.5V to 4.6 V Power dissipation ......... 1.0 W Data out current (short circuit) .... 50 mA
*Note: Operation above Absolute Maximum Ratings can adversely affect device reliability.
Absolute Maximum Ratings*
Capacitance*
TA = 25°C, VCC = 3.3 V ± 0.3 V, VSS = 0 V, f = 1 Mhz
Symbol CIN1 CIN2 COUT Parameter Address Input RAS, UCAS, LCAS, WE, OE Data Input/Output Min. -- -- -- Max. 5 7 7 Unit pF pF pF
*Note: Capacitance is sampled and not 100% tested.
V53C364165A Rev. 0.2 September 1998
2
MOSEL VITELIC
Block Diagram
4M x 16
I/O1 I/O2 ··· I/O16
V53C364165A
Data In Buffer WE LCAS UCAS 16
Data Out Buffer 16
OE
No. 2 Clock Generator
9 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12
Column Address Buffers (9)
9
Column Decoder
Refresh Controller Sense Amplifier I/O Gating Refresh Counter (13) 13 13 Row Address Buffers (13) 13 Row Decoder 8192 Memory Array 8192 x 512 x 16 512 x16
16
RAS
No. 1 Clock Generator
316516500-03
V53C364165A Rev. 0.2 September 1998
3
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