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Details, datasheet, quote on part number:V53C816HT60
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Datasheet text preview:
s
MOSEL VITELIC
V53C816H 512K X 16 FAST PAGE MODE CMOS DYNAMIC RAM
PRELIMINARY
HIGH PERFORMANCE
Max. RAS Access Time, (tRAC) Max. Column Address Access Time, (tCAA) Min. Fast Page Mode Cycle Time, (tPC) Min. Read/Write Cycle Time, (tRC)
40
40 ns 20 ns 23 ns 75 ns
45
45 ns 22 ns 25 ns 80 ns
50
50 ns 24 ns 28 ns 90 ns
60
60 ns 30 ns 35 ns 110 ns
Features
s 512K x 16-bit organization s RAS access time: 40, 45, 50, 60 ns s Fast Page Mode for a sustained data rate of 43 MHz s Dual CAS Inputs s Pin-to-Pin compatible with 256Kx16 s Low power dissipation Read-Modify-Write, RAS-Only Refresh, CAS-Before-RAS Refresh s Refresh Interval: 512 cycles/8 ms s Available in 40-pin 400 mil SOJ s Single +5V Power Supply s TTL Interface
Description
The V53C816H is a 524,288 x 16 bit high-performance CMOS dynamic random access memory. The V53C816H offers Fast Page mode with dual CAS inputs. An address, CAS and RAS input capacitances are reduced to one half when the 256Kx16 DRAM is used to construct the same memory density. The V53C816H has asymmetric address, 10-bit row and 9-bit column. All inputs are TTL compatible. Fast Page Mode operation allows random access up to 512K x 16 bits, within a page, with cycle times as short as 23ns. The V53C816H is best suited for graphics, and buffer memory applications.
Device Usage Chart
Operating Temperature Range 0°C to 70 °C Package Outline K · 40 · Access Time (ns) 45 · 50 · 60 · Power Std. · Temperature Mark Blank
V53C816H Rev. 1.3 February 1999
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MOSEL VITELIC
V 53
MOSEL-VITELIC MANUFACTURED 53 = DRAM C = CMOS PROCESS 8 = 8M-BIT
V53C816H
C 8 16 H K
HIGH PERFORMANCE BLANK = 5V DATA WIDTH: 16 = 16-BIT FP
SPEED 40 ns 45 ns 50 ns 60 ns
Description SOJ
Pkg. K
Pin Count 40
PACKAGE TYPE K = SOJ
816H-01
40-Pin SOJ PIN CONFIGURATION Top View
Vcc I/O0 I/O1 I/O2 I/O3 Vcc I/O4 I/O5 I/O6 I/O7 NC NC WE RAS A9 A0 A1 A2 A3 Vcc
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
816H-02
Pin Names
A0A9 RAS Address Inputs, A9 is effective with RAS Row Address Strobe Column Address Strobe Upper Byte Control Column Address Strobe Lower Byte Control Write Enable Output Enable Data Input, Output +5V Supply 0V Supply No Connect
Vss I/O15 I/O14 I/O13 I/O12 Vss I/O11 I/O10 I/O9 I/O8 NC LCAS UCAS OE A8 A7 A6 A5 A4 Vss
UCAS LCAS WE OE I/O0I/O15 VCC VSS NC
V53C816H Rev. 1.3 February 1999
2
MOSEL VITELIC
Absolute Maximum Ratings*
Ambient Temperature Under Bias ...... 10°C to +80°C Storage Temperature (plastic) ..... 55°C to +125°C Voltage Relative to VSS ........1.0 V to +7.0 V Data Output Current .... 50 mA Power Dissipation ......... 1.4 W
*Note: Operation above Absolute Maximum Ratings can adversely affect device reliability.
V53C816H
Capacitance*
TA = 25°C, VCC = 5 V ± 10%, f = 1 MHz
Symbol CIN1 CIN2 COUT Parameter Address Input RAS, CAS, WE, OE Data Input/Output Typ. 3 4 5 Max. 4 5 7 Unit pF pF pF
* Note: Capacitance is sampled and not 100% tested
Block Diagram
512K x16
OE WE UCAS LCAS RAS
RAS CLOCK GENERATOR
CAS CLOCK GENERATOR
WE CLOCK GENERATOR
OE CLOCK GENERATOR
VCC
DATA I/O BUS COLUMN DECODERS
Y0 -Y 8
I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5
SENSE AMPLIFIERS REFRESH COUNTER
512 x 16 10 A0 A1
· · ·
I/O BUFFER
I/O 6 I/O 7 I/O 8 I/O 9 I/O 10
ADDRESS BUFFERS AND PREDECODERS
X 0 -X 9
ROW DECODERS
1024
MEMORY ARRAY 512K x 16
I/O 11 I/O 12 I/O 13 I/O 14 I/O 15
816H-03
A7 A8 A9
V53C816H Rev. 1.3 February 1999
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