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Part: V53C819HK

Category:
 Memory
   -> DRAM
     -> EDO/FPM DRAM
       -> 16 Mb
             -> Asynchronous->5V EDO

Description: High Performance Edo Page Mode, Dual Ras CMOS Dynamic RAM: 512kx16

Company: Mosel-Vitelic

Datasheet: Download V53C819HK datasheet     File size : 238 kB

Request For quote: Find where to buy V53C819HK



Datasheet text preview:
MOSEL VITELIC
V53C819HK HIGH PERFORMANCE 512K X 16 EDO PAGE MODE, DUAL RAS CMOS DYNAMIC RAM
PRELIMINARY
HIGH PERFORMANCE
Max. RAS Access Time, (tRAC) Max. Column Address Access Time, (tCAA) Min. Extended Data Out Mode Cycle Time, (tPC) Min. Read/Write Cycle Time, (tRC)
25
25 ns 13 ns 10 ns 45 ns
27
27 ns 15 ns 11 ns 50 ns
30
30 ns 16 ns 12 ns 60 ns
Features
s 256K x 16 -bit x 2 organization (one 256K x 16 block for each RAS) s EDO Page Mode for a sustained data rate of 100 MHz (-25ns) s RAS access time: 25, 27, 30 ns s Dual CAS Inputs, Dual RAS inputs s Low power dissipation s Read-Modify-Write, RAS-Only Refresh, CAS-Before-RAS Refresh s Optional Self Refresh (V53C819SHK) s Refresh Interval: 512 cycles/8 ms s Available in 40-pin 400 mil SOJ s Single +5V ±10% Power Supply s TTL Interface
Description
The V53C819HK is a high speed 524,288 x 16 bit high performance CMOS dynamic random access memory. The V53C819HK offers a combination of unique features. This dual RAS product offers two internal 256K x 16 banks, one corresponding to each RAS. This product also features EDO Page Mode operation for higher sustained bandwidth with Page Mode cycle times as short as 10ns. All inputs are TTL compatible. Input and output capicatance is significantly lowered to increase performance and minimize loading. These features make the V53C819HK ideally suited for a wide variety of high performance computer systems and peripheral applications.
Device Usage Chart
Operating Temperature Range 0°C to 70°C Package Outline K · 25 · Access Time (ns) 27 · 30 · Power Std. · Temperature Mark Blank
V53C819HK Rev. 0.7 February 1999
1
MOSEL VITELIC
Part Name
V53C819HK V53C819SHK
V53C819HK
Supply Voltage
5V 5V
Self Refresh
No Self Refresh Optional Standard Self Refresh (8ms)
Package
SOJ SOJ
Speed
25/27/30 25/27/30
40-Pin SOJ PIN CONFIGURATION Top View
Vcc I/O1 I/O2 I/O3 I/O4 Vcc I/O5 I/O6 I/O7 I/O8 Vss NC WE RAS0 RAS1 A0 A1 A2 A3 Vcc
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
819HK-02
V
5
3
C
8
1
9
S
H
FAMILY
DEVICE
PKG
SPEED ( t RAC)
TEMP. PWR. BLANK (0°C to 70°C)
Vss I/O16 I/O15 I/O14 I/O13 Vss I/O12 I/O11 I/O10 I/O9 Vcc LCAS UCAS OE A8 A7 A6 A5 A4 Vss
S (OPTIONAL STANDARD SELF REFRESH) H (5V) K (SOJ)
BLANK (NORMAL) 25 (25 ns) 27 (27 ns) 30 (30 ns)
819HK-01
Pin Names
A0­A8 RAS0, RAS1 UCAS LCAS WE OE I/O1­I/O16 VCC VSS NC Address Inputs Row Address Strobes Column Address Strobe/Upper Byte Control Column Address Strobe/Lower Byte Control Write Enable Output Enable Data Input, Output +5V Supply 0V Supply No Connect
V53C819HK Rev. 0.7 February 1999
2
MOSEL VITELIC
Absolute Maximum Ratings*
Ambient Temperature Under Bias .... ­10°C to +80°C Storage Temperature (plastic) ..... ­55°C to +125°C Voltage Relative to VSS ........­1.0 V to +7.0 V Data Output Current .... 50 mA Power Dissipation ......... 1.5 W
*Note: Operation above Absolute Maximum Ratings can adversely affect device reliability.
V53C819HK
TA = 25°C, VCC = 5 V ± 10%, VSS = 0 V
Symbol CIN1 CIN2 COUT Parameter Address Input RAS, CAS, WE, OE Data Input/Output Typ. 3 4 5 Max. 4 5 7 Unit pF pF pF
Capacitance*
* Note: Capacitance is sampled and not 100% tested
Block Diagram
512K x 16
OE WE UCAS LCAS RAS0 RAS RAS1
RAS CLOCK GENERATOR
CAS CLOCK GENERATOR
WE CLOCK GENERATOR
OE CLOCK GENERATOR
VCC VSS
DATA I/O BUS COLUMN DECODERS
Y -Y8 0
I/O 1 I/O 2 I/O 3
SENSE AMPLIFIERS
SENSE AMPLIFIERS
I/O BUFFER
I/O 4 I/O 5 I/O 6 I/O 7 I/O 8 I/O 9 I/O 10 I/O 11 I/O 12 I/O 13 I/O 14 I/O 15 I/O 16
REFRESH COUNTER
9
256Kx 16
256K x 16
A0 A1
A7 A8
X0 -X8
ROW DECODERS
· · ·
ADDRESS BUFFERS
MEMORY ARRAY 256K X 16 (BANK0)
MEMORY ARRAY 256K X 16 (BANK1)
819HK-03
512
V53C819HK Rev. 0.7 February 1999
3


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