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Details, datasheet, quote on part number:V62C1161024LL-70T
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Datasheet text preview:
V62C1161024L(L)
Ultra Low Power 64K x 16 CMOS SRAM
Features
· Ultra Low-power consumption - Active: 30mA ICC at 70ns - Stand-by: 5 µA (CMOS input/output) 1 µA (CMOS input/output, L version) · 70/85/100/120 ns access time · Equal access and cycle time · Single +1.8V to 2.2V Power Supply · Tri-state output · Automatic power-down when deselected · Multiple center power and ground pins for improved noise immunity · Individual byte controls for both Read and Write cycles · Available in 44 pin TSOP (II) Package
Functional Description
The V62C1161024L is a Low Power CMOS Static RAM organized as 65,536 words by 16 bits. Easy memory expansion is provided by an active LOW (CE) and (OE) pin. This device has an automatic power-down mode feature when deselected. Separate Byte Enable controls (BLE and BHE) allow individual bytes to be accessed. BLE controls the lower bits I/O1 - I/O8. BHE controls the upper bits I/O9 - I/O16. Writing to these devices is performed by taking Chip Enable (CE) with Write Enable (WE) and Byte Enable (BLE/BHE) LOW. Reading from the device is performed by taking Chip Enable (CE) with Output Enable (OE) and Byte Enable (BLE/BHE) LOW while Write Enable (WE) is held HIGH.
Logic Block Diagram
Pre-Charge Circuit
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9
TSOP(II)
Row Select
Vcc Vss
Memory Array 1024 X 1024
I/O1 - I/O8 I/O9 - I/O16
Data Cont Data Cont
I/O Circuit Column Select
A10 A11 A12 A13 A14 A15
WE OE
BHE BLE CE
A4 A3 A2 A1 A0 CE I/O1 I/O2 I/O3 I/O4 Vcc Vss I/O5 I/O6 I/O7 I/O8 WE A15 A14 A13 A12 NC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23
A5 A6 A7 OE BHE BLE I/O16 I/O15 I/O14 I/O13 Vss Vcc I/O12 I/O11 I/O10 I/O9 NC A8 A9 A10 A11 NC
1
REV. 1.1 April 2001 V62C1161024L(L)
V62C1161024L(L)
Absolute Maximum Ratings * Parameter
Voltage on Any Pin Relative to Gnd Power Dissipation Storage Temperature (Plastic) Temperature Under Bias
Symbol
Vt PT Tstg Tbias
Minimum
-0.5 - -55 -40
Maximum
+4.0 1.0 +150 +85
Unit
V W
0C 0
C
* Note: Stresses greater than those listed above Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and function operation of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect reliability.
Truth Table
CE OE WE BLE BHE I/O1-I/O8 I/O9-I/O16 Power Mode
H L L L L L L L L
X L L L X X X H X
X H H H L L L H X
X L H L L L H X H
X H L L L H L X H
High-Z Data Out High-Z Data Out Data In Data In High-Z High-Z High-Z
High-Z High-Z Data Out Data Out Data In High-Z Data In High-Z High-Z
Standby Active Active Active Active Active Active Active Active
Standby Low Byte Read High Byte Read Word Read Word Write Low Byte Write High Byte Write Output Disable Output Disable
* Key: X = Don't Care, L = Low, H = High
Recommended Operating Conditions (TA = 0oC to +70oC / -40oC to 85oC**) Parameter
Supply Voltage
Symbol
VCC Gnd VIH VIL
Min
1.8 0.0 1.6 -0.5*
Typ
2.0 0.0 -
Max
2.2 0.0 VCC + 0.2 0.4
Unit
V V V V
Input Voltage
* VIL min = -2.0V for pulse width less than tRC/2. ** For Industrial Temperature
2
REV. 1.1 April 2001 V62C1161024L(L)
V62C1161024L(L)
DC Operating Characteristics (Vcc = 2V+10%, Gnd = 0V, TA = 00C to +700C / -400C to 850C) Parameter
Input Leakage Current Output Leakage Current Operating Power Supply Current Average Operating Current
Sym
Test Conditions
Vcc = Max, Vin = Gnd to Vcc CE = VIH or Vcc= Max, VOUT = Gnd to Vcc CE = VIL , VIN = VIH or VIL , IO U T = 0 IOUT = 0mA, Min Cycle, 100% Duty CE < 0.2V IOUT = 0mA,
Cycle Time=1µs, Duty=100%
-70
1 1 3 30 3 -
-85
1 1 3 25 3 -
-100
1 1 3 20 3 -
-120
1 1 3 20 3
Min Max Min Max Min Max Min Max
Unit
µA µA
IILI IILO
ICC ICC1 ICC2
mA
mA
mA
Standby Power Supply Current (TTL Level) Standby Power Supply Current (CMOS Level) Output Low Voltage Output High Voltage
ISB ISB1
CE = VIH CE > Vcc - 0.2V VIN Vcc- 0.2V IOL = 2 mA IOH = -1 mA
-
0.5 5 1 0.4 -
1.6
0.5 5 1 0.4 -
1.6
0.5 5 1 0.4 -
1.6
0.5 5 1 0.4 -
mA
L LL
1.6
µA µA
V V
VO L VO H
Capacitance (f = 1MHz, TA = 250C) Parameter*
Input Capacitance I/O Capacitance
Symbol
C in C I/O
Test Condition
Vin = 0V Vin = Vout = 0V
Max
7 8
Unit
pF pF
* This parameter is guaranteed by device characterization and is not production tested.
AC Test Conditions Input Pulse Level Input Rise and Fall Time Input and Output Timing Reference Level Output Load Condition 70ns/85ns Load for 100ns/120ns
0.4V to 1.6V 5ns 1.0V
CL*
TTL
CL = 30pf + 1TTL Load CL = 100pf + 1TTL Load
Figure A.
* Including Scope and Jig Capacitance
3
REV. 1.1 April 2001 V62C1161024L(L)
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