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Details, datasheet, quote on part number:V62C1162048LL-70T
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Datasheet text preview:
V62C1162048L(L)
Ultra Low Power 128K x 16 CMOS SRAM
Features
· Low-power consumption - Active: 35mA ICC at 70ns - Stand-by: 10 µA (CMOS input/output) 2 µA (CMOS input/output, L version) · 70/85/100/120 ns access time · Equal access and cycle time · Single +1.8V to2.2V Power Supply · Tri-state output · Automatic power-down when deselected · Multiple center power and ground pins for improved noise immunity · Individual byte controls for both Read and Write cycles · Available in 44 pin TSOPII / 48-fpBGA / 48-µBGA
Functional Description
The V62C1162048L is a Low Power CMOS Static RAM organized as 131,072 words by 16 bits. Easy Memory expansion is provided by an active LOW (CE) and (OE) pin. This device has an automatic power-down mode feature when deselected. Separate Byte Enable controls (BLE and BHE) allow individual bytes to be accessed. BLE controls the lower bits I/O1 - I/O8. BHE controls the upper bits I/O9 - I/O16. Writing to these devices is performed by taking Chip Enable (CE) with Write Enable (WE) and Byte Enable (BLE/BHE) LOW. Reading from the device is performed by taking Chip Enable (CE) with Output Enable (OE) and Byte Enable (BLE/BHE) LOW while Write Enable (WE) is held HIGH.
Logic Block Diagram
Pre-Charge Circuit
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9
TSOPII / 48-fpBGA / 48-µBGA (See nest page)
A4 A3 A2 A1 A0 CE I/O1 I/O2 I/O3 I/O4 Vcc Vss I/O5 I/O6 I/O7 I/O8 WE A16 A15 A14 A13 A12 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A5 A6 A7 OE BHE BLE I/O16 I/O15 I/O14 I/O13 Vss Vcc I/O12 I/O11 I/O10 I/O9 NC A8 A9 A10 A11 NC
Row Select
Vcc Vss
Memory Array 1024 X 2048
I/O1 - I/O8 I/O9 - I/O16
Data Cont Data Cont
I/O Circuit Column Select
A10 A11 A12 A13 A14 A15 A16
WE OE
BHE BLE CE
1
REV. 1.2 May 2001 V62C1162048L(L)
V62C1162048L(L)
MOSEL VITELIC V62C1162048L(L)M
1 2 3 4 5 6 1 2 3 4 5 6
A
BLE
OE
A0
A1
A2
NC
B
I/O9
BHE
A3
A4
CE
I/O1
C
I/O10
I/O11
A5
A6
I/O2
I/O3
D
VSS
I/O12
NC
A7
I/O4
VCC
E
VCC
I/O13
NC
A16
I/O5
VSS
F
I/O15
I/O14
A14
A15
I/O6
I/O7
G H
I/O16 NC
NC A8
A12 A9
A13 A10
WE A11
I/O8 NC
Note: NC means no Ball.
Top View
Top View
48 Ball - 6 x 8 µ BGA (Ultra Low Power)
C A1
PACKAGE OUTLINE DWG.
SYMBOL A
UNIT:MM 1.10+0.10 0.22+0.05 0.35 0.36(TYP) 8.00+0.10 5.25 6.00+0.10 3.75 0.75TYP 0.10
A
aaa
SIDE VIEW
A1 b c
D D1
D D1 E
6
e
E1 e
5
aaa
4
E1 E
3
2
1 A B C D E F G H
BOTTOM VIEW
b SOLDER BALL
2
REV. 1.2 May 2001 V62C1162048L(L)
V62C1162048L(L)
Absolute Maximum Ratings * Parameter
Voltage on Any Pin Relative to Gnd Power Dissipation Storage Temperature (Plastic) Temperature Under Bias
Symbol
Vt PT Tstg Tbias
Minimum
-0.5 - -55 -40
Maximum
+4.0 1.0 +150 +85
Unit
V W
0
C
0C
* Note: Stresses greater than those listed above Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and function operation of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Truth Table
CE OE WE BLE BHE I/O1-I/O8 I/O9-I/O16 Power Mode
H L L L L L L L L
X L L L X X X H X
X H H H L L L H X
X L H L L L H X H
X H L L L H L X H
High-Z Data Out High-Z Data Out Data In Data In High-Z High-Z High-Z
High-Z High-Z Data Out Data Out Data In High-Z Data In High-Z High-Z
Standby Active Active Active Active Active Active Active Active
Standby Low Byte Read High Byte Read Word Read Word Write Low Byte Write High Byte Write Output Disable Output Disable
* Key: X = Don't Care, L = Low, H = High
Recommended Operating Conditions (TA = 0oC to +70oC / -40oC to 85oC**) Parameter
Supply Voltage
Symbol
VCC Gnd VIH VIL
Min
1.8 0.0 1.6 -0.5*
Typ
2.0 0.0 -
Max
2.2 0.0 VCC + 0.2 0.4
Unit
V V V V
Input Voltage
* VIL min = -2.0V for pulse width less than tRC/2. ** For Industrial Temperature
3
REV. 1.2 May 2001 V62C1162048L(L)
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