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Details, datasheet, quote on part number:V62C2164096
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Datasheet text preview:
V62C2164096 256K x 16, 0.17 µm CMOS STATIC RAM
PRELIMINARY
s s s s s s s s
CILETIV LESOM
Features
A0 A6 A7 A8 A9 I/O1 I/O16 UBE LBE OE WE CE1 CE2
Description
T h e V 6 2 C 2 1 6 4 0 9 6 is a 4 , 1 9 4 ,3 0 4 - b i t s t a ti c ra n d o m - a c ce s s m e m o r y o rg a n i z ed as 2 6 2 , 1 4 4 words by 16 bits. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.
High-speed: 70, 85 ns Ultra low CMOS standby current of 4µA (max.) Fully static operation All inputs and outputs directly TTL compatible Three state outputs Ultra low data retention current (VCC = 1.2V) Operating voltage: 2.3V 3.0V Packages 44-pin TSOP (Standard) 48-Ball C SP BGA (8mm x 10mm)
Functional Block Diagram
VCC Row Decoder 1024 x 4096 Memory Array GND
Column I/O Input Data Circuit Column Decoder
A10
A17
Control Circuit
Device Usage Chart
Operating Temperature Range 0°C to 70°C 40°C to +85°C Package Outline T · · B · · A ccess Time ( ns) 70 · · 85 · · L · Power LL · · Temperature Mark Blank I
V62C2164096 Rev. 1.0 November 2001
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V62C2164096
UBE, LBE Byte Enable Active low inputs. These inputs are used to enable the upper or lower data byte. Write Enable Input WE The write enable input is active LOW and controls read and w rite operations. W ith the chip enabled, when W E is HIGH and OE is LOW, output data will be present at the I/O pins; w hen WE is LOW and OE is HIGH, the data present on the I/O pins will be written into the selected memory locations. I/O1I/O16 Data Input and Data Output Ports These 16 bidirectional ports are used to read data from and write data into the RAM. V CC GN D Power Supply G ro un d
A 0A17 Address Inputs These 18 address inputs select one of the 256K x 16 bit segments in the RAM. CE1, CE2* Chip Enable Inputs CE1 is active LOW and CE2 is active HIGH. Both chip enables must be active to read from or write to the device. If either chip enable is not active, the d e v i c e i s d e s e l e c t e d a n d i s i n a s ta n d b y p o w e r mode. The I/O pins will be in the high-impedance state when deselected. OE Output Enable Input The output enable input is active LOW. With c hip enabled, when OE is Low and WE H igh, data w ill be presented on the I/O pins. The I/O pins will be in the high impedance state when OE is High. *CE2 is available on BGA package only.
CILETIV LESOM
Pin Descriptions
A4 A3 A2 A1 A0 CE1 I/O1 I/O2 I/O3 I/O4 VCC GND I/O5 I/O6 I/O7 I/O8 WE A15 A14 A13 A12 A16
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
Pin Configurations (Top View)
44-Pin TSOP-II (Standard)
44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23
A5 A6 A7 OE UBE LBE I/O16 I/O15 I/O14 I/O13 GND VCC I/O12 I/O11 I/O10 I/O9 NC A8 A9 A10 A11 A17
4 8 B GA
1 A B C D E F G H 2 3 4 5 6 A B 1 BLE I/O9 2 OE BHE 3 A0 A3 4 A1 A4 A6 A7 5 A2 6 CE2
CE1 I/O1 I/O2 I/O3 I/O4 VCC
C I/O10 I/O11 A5 D E F VSS I/O12 A17 VCC I/O13 NC
A16 I/O5 VSS
I/O15 I/O14 A14 A15 I/O6 I/O7 NC A8 A12 A13 A9 WE I/O8 NC
G I/O16 H NC
A10 A11
Note: NC means no connect. TOP VIEW TOP VIEW
V62C2164096 Rev. 1.0 November 2001
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V62C2164096
CILETIV LESOM
V
MOSEL-VITELIC MANUFACTURED 62 = STANDARD
Part Number Information
62 C 21 16 4096
TEMP. SRAM FAMILY OPERATING VOLTAGE DENSITY 4096K PWR. 70 ns 85 ns T = TSOP STANDARD B = BGA L = LOW POWER LL = DOUBLE LOW POWER SPEED PKG BLANK = 0°C to 70°C I = -40°C to +85°C
C = CMOS PROCESS 21 = 2.3V3.0V ORGANIZATION 16 = 16-bit
Absolute Maximum Ratings (1)
S y mb o l
VCC VN VDQ TBIAS TSTG
Parameter
Supply Voltage Input Voltage Input/Output Voltage Applied Temperature Under Bias Storage Temperature
C ommercial
-0.5 to VCC + 0.5 -0.5 to VCC + 0.5 VCC + 0.3 -10 to +125 -55 to +125
Industrial
-0.5 to VCC + 0.5 -0.5 to VCC + 0.5 VCC + 0.3 -65 to +135 -65 to +150
Units
V V V °C °C
NOTE: 1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Capacitance* TA = 25°C, f = 1.0MHz
Symbol CIN CO UT Parameter Input Capacitance Output Capacitance Conditions VIN = 0V VI/O = 0V Max. 6 8 Unit pF pF
NOTE: 1. This parameter is guaranteed and not tested.
T r u th T a b l e
Mo d e
Standby Standby Output Disable Output Disable Read Read Read Write Write Write
CE1
H X L L L L L L L L
CE2
X L H H H H H H H H
OE
X X X H L L L X X X
WE
X X X H H H H L L L
UBE
X X H X L L H L L H
LBE
X X H X L H L L H L
I/O9-16 Operation
High Z High Z High Z High Z DOUT DOUT High Z DIN DIN High Z
I/O1-8 Operation
High Z High Z High Z High Z DOUT High Z DOUT DIN High Z DIN
NOTE: X = Don't Care, L = LOW, H = HIGH
V62C2164096 Rev. 1.0 November 2001
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