Details, datasheet, quote on part number: 68HC908LJ12
Part68HC908LJ12
Category
DescriptionMicrocontroller
CompanyMotorola Semiconductor Products
DatasheetDownload 68HC908LJ12 datasheet
  

 

Features, Applications

This addendum provides information to the following MCU devices: MC68HLC908LJ12 (see page 1) MC68HC08LJ12 (see page 9)

The entire MC68HC908LJ12 Technical Data, Rev. 2 (Motorola document number MC68HC908LJ12/D) applies to the these two devices, with exceptions outlined in this addendum. Amendments to MC68HC908LJ12/D, Rev. 2, are documented on page 13.

The is a low-voltage version of the MC68HC908LJ12, with an operating voltage range to 3.3V.

The FLASH memory can be read at operating voltages from to 3.3V. Program or erase operations require a minimum operating voltage of 2.7V.

The LVI module is not designed for the MC68HLC908LJ12. After an MCU reset, the LVI module is disabled (LVIPWRD in CONFIG1). The LVIPWRD bit should be left as logic 1 (the default setting).

Electrical specifications for the MC68HLC908LJ12 device are given in the following tables.
Functional Operating Range Table 1. Operating Range

Characteristic Operating temperature range Operating voltage range Maximum internal operating frequency Symbol TA VDD fOP Value 3.3 4 Unit

Operating voltage for FLASH memory program and erase operations

Characteristic(1) Output high voltage (ILOAD = 1.0 mA) All ports Output low voltage (ILOAD = 0.8mA) All ports (ILOAD = 4.0 mA) PTB2PTB5 (ILOAD = 10.0 mA) PTB0/TxDPTB1 Input high voltage All ports, RST, IRQ, OSC1 Input low voltage All ports, RST, IRQ, OSC1 VDD supply current Run(3), fOP = 2 MHz with all modules on with ADC on with ADC off Wait(4), fOP = 2 MHz (all modules off) Stop, fOP = 8 kHz

25C (with OSC, RTC, LCD(6), LVI on) 25C (with OSC, RTC, LCD(6) on) 25C (with OSC, RTC on) 25C (all modules off) Digital I/O ports Hi-Z leakage current All ports, RST IIL

Characteristic(1) Input current IRQ Capacitance Ports (as input or output) POR re-arm voltage(7) POR rise-time ramp rate(8) Symbol IIN COUT CIN VPOR RPOR VHI RPU1 RPU2 Min VDD 25 27 Max Unit

Monitor mode entry voltage (at IRQ pin) Pullup PTA0PTA3, PTD4PTD7 configured as KBI0KBI7 RST, IRQ

1. VDD to 2.7 Vdc, VSS = 0 Vdc, TL to TH, unless otherwise noted. 2. Typical values reflect average measurements at midpoint of voltage range, 25 C only. 3. Run (operating) IDD measured using external square wave clock source. All inputs 0.2 V from rail. No dc loads. Less than pF on all outputs. on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects run IDD. 4. Wait IDD measured using external square wave clock source. All inputs 0.2 V from rail. No dc loads. Less than pF on all outputs. on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects wait IDD. 5. The 8kHz clock is from a 32kHz clock input at OSC1, for the driving the RTC. 6. LCD driver configured for low current mode. 7. Maximum is highest voltage that POR is guaranteed. 8. If minimum VDD is not reached before the internal POR reset is released, RST must be driven low externally until minimum VDD is reached. 9. RPU1 and RPU2 are measured at VDD = 2.6V.

Characteristic(1) Output high voltage (ILOAD = 1.0 mA) All ports Output low voltage (ILOAD = 0.8mA) All ports (ILOAD = 4.0 mA) PTB2PTB5 (ILOAD = 10.0 mA) PTB0/TxDPTB1 Input high voltage All ports, RST, IRQ, OSC1 Input low voltage All ports, RST, IRQ, OSC1 Symbol VOH Min VDD 0.4 Typ(2) Max Unit V


 

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