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Part: DSP56167PB
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Description:
Company: Motorola Semiconductor Products
Datasheet: Download DSP56167PB datasheet File size : 331 kB
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MOTOROLA
SEMICONDUCTOR PRODUCT INFORMATION
Order this document by: DSP56167P/D
DSP56167
Advance Information
16-BIT DIGITAL SIGNAL PROCESSOR
The general purpose, programmable DSP56167 is an enhanced version of the DSP56166 with added features. Designed primarily for speech coding and digital communications, the DSP56167 has a built-in codec and Phase Lock Loop (PLL). This MPU-style DSP also contains memories and digital peripherals that provide a cost effective, high performance solution to many DSP applications. On-Chip Emulation (OnCETM) circuitry provides convenient and inexpensive debug facilities normally available only through expensive external hardware. This RAM-based DSP contains a 2 K × 16 Program RAM and a 4 K × 16 data RAM. The Central Processing Unit (CPU) consists of three execution units operating in parallel, allowing up to six operations to occur in an instruction cycle. This parallelism greatly increases the effective processing speed of the DSP56167. The MPU-style programming model and instruction set allow straightforward generation of efficient, compact code. The DSP56167 is a member of Motorola's DSP56100 family of 16-bit Digital Signal Processors (DSPs).
Port B or Host
15 7+10
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Bootstrap ROM 64 × 16 XDB PDB GDB Program Control Unit Program Decode Controller Program Interrupt Controller Program Address Generator 4 RESET
Address Generation Unit Peripheral Address Generation Unit
IN
XAB1 XAB2 PAB Program RAM 2 K × 16 Data RAM 4 K × 16 Data ALU 16 × 16 + 40 40-Bit MAC Two 40-Bit Accumulators MODA/IRQA MODB/IRQB MODC/IRQC
AR
External Address Bus Switch 16 Bus Control External Data Bus Switch 16 External Chip Enables 2 16 Bits
On-Chip Peripherals: Host, SSI0, SSI1, Timer GPIO, Codec Internal Data Bus Switch and Bit Manipulation Unit Clock and PLL OnCETM
EL
Codec, Port C and/or SSI0, SSI1, Timer
PR
EXTAL SXFC CLKO
Figure 1 DSP56167 Block Diagram
This document contains information on a new product. Specifications and information herein are subject to change without
©1996 MOTOROLA, INC.
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Address Port A AA0771 10 Data
DSP56167 Features
DSP56167 FEATURES
· Digital Signal Processing Core Up to 30 Million Instructions Per Second (MIPS) at 60 MHz with 33.3 ns instruction cycle Single-cycle 16 × 16-bit parallel Multiplier-Accumulator (MAC) 2 × 40-bit accumulators with extension byte
Fractional and integer arithmetic with support for multiprecision arithmetic
Nested hardware DO loops including infinite loops and DO zero loop Two instruction LMS adaptive filter loop Fast auto-return interrupts
Three 16-bit internal data and three 16-bit internal address buses Individual programmable wait states on the external bus for program, data, and peripheral memory spaces
Off-chip memory-mapped peripheral space with programmable access time and separate peripheral enable pin Peripheral Address Generation Unit (PAGU) On-chip memory-mapped peripheral registers On-Chip Emulation (OnCETM) port for unobtrusive, processor speed-independent debugging with DR line static latch with Reset
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2
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· Memory 64 × 16-bit bootstrap ROM
Modified Harvard architecture permits simultaneous accesses to program and data memories 2 K × 16-bit on-chip Program RAM 4 K × 16-bit on-chip data RAM
External memory expansion with 16-bit address and data buses with static latches with Reset and software-controlled BG pull-down
Bootstrap loading from external byte-wide Program ROM, Host Interface, or 16bit Synchronous Serial Interface (SSI0)
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Programmable absolute short addressing mode
IN
DSP56167P/D
Three external interrupt request pins
AR
MOTOROLA
Highly parallel instruction set with unique DSP addressing modes
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Product Documentation
·
Peripherals Up to twenty-five General Purpose Input/Output (GPIO) pins, depending on which peripherals are enabled Byte-wide Host Interface with Direct Memory Access (DMA) support (or up to fifteen Port B GPIO lines) On-chip voice band codec, Analog-to-Digital (A/D) and Digital-to-Analog (D/A) · ·
Internal voltage reference (1/2 of positive power supply) and split-voltage operation (with respect to the core) No off-chip components required
16-bit SSI support: two 4-pin ports (or up to eight Port C GPIO lines) One 16-bit timer/event counter (or two Port C GPIO lines) Double-buffered peripherals
Software-programmable, Phase Lock Loop-based (PLL) frequency synthesizer for the DSP core clock with a wide input frequency range (12.2 KHz to 60 MHz) that initializes to a preset low frequency operation during hardware reset
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Energy Efficient Design
Power-saving Wait and Stop modes
Fully static, HCMOS design allows operation from 60 MHz down to DC operating frequencies 112-pin plastic Thin Quad Flat Pack (TQFP) surface-mount package
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· · · ·
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A local Motorola distributor
PRODUCT DOCUMENTATION
The three documents listed in the following table are required for a complete description of the DSP56167 and are necessary to design properly with the part. Documentation is available from one of the following locations (see back cover for detailed information):
A Motorola semiconductor sales office A Motorola Literature Distribution Center The World Wide Web (WWW) (the source for the latest information)
MOTOROLA
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DSP56167P/D
Independent external chip enables BR and PEREN during Bus Master mode
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Y
3
Table 1 DSP56167 Documentation
Name Description Order Number DSP56100FM/AD See note below
DSP56100 Family Detailed description of the DSP56100 family Manual processor core and instruction set DSP56167 User's Manual DSP56167 Technical Data Note: Detailed functional description of the DSP56167 memory configuration, operation, and register programming
DSP56167 features list and physical, electrical, timing, DSP56167/D and package specifications
The DSP56167 User's Manual is currently being developed and will not be available for general release until the end of the fourth quarter of 1996. The DSP56167 is a feature expanded, enhanced version of the DSP56166 and is entirely software compatible. Until the DSP56167 User's Manual is available, the user can refer to the DSP56166 User's Manual, order number DSP56166UM/AD for information common to both chips and Section 4 of the DSP56167 Technical Data sheet, order number DSP56167/D, for a description of the added features and enhanced capability of the DSP56167.
OnCE and Mfax are trademarks of Motorola, Inc.
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/ Affirmative Action Employer. How to reach us: USA/Europe/Locations Not Listed: Motorola Literature Distribution P.O. Box 20912 Phoenix, Arizona 85036 1 (800) 441-2447 or 1 (602) 303-5454 MfaxTM: RMFAX0@email.sps.mot.com TOUCHTONE (602) 244-6609 Asia/Pacific: Motorola Semiconductors H.K. Ltd. 8B Tai Ping Industrial Park 51 Ting Kok Road Tai Po, N.T., Hong Kong 852-2662928 Technical Resource Center: 1 (800) 521-6274 DSP Helpline dsphelp@dsp.sps.mot.com Internet: http://www.motorola-dsp.com Japan: Nippon Motorola Ltd. Tatsumi-SPD-JLDC 6F Seibu-Butsuryu-Center 3-14-2 Tatsumi Koto-Ku Tokyo 135, Japan 03-3521-8315
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