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Part: MC12210D
Category:
Timing Circuits
Description: Mecl PLL Components Serial PLL Frequency Syntiesizer
Company: Motorola Semiconductor Products
Datasheet: Download MC12210D datasheet File size : 119 kB
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Serial Input PLL Frequency Synthesizer
The MC12210 is a 2.5 GHz Bipolar monolithic serial input phase locked loop (PLL) synthesizer with pulseswallow function. It is designed to provide the high frequency local oscillator signal of an RF transceiver in handheld communication applications. Motorola's advanced Bipolar MOSAICTM V technology is utilized for low power operation at a minimum supply voltage of 2.7 V. The device is designed for operation over 2.7 to 5.5 V supply range for input frequencies up to 2.5 GHz with a typical current drain of 9.5 mA. The low power consumption makes the MC12210 ideal for handheld battery operated applications such as cellular or cordless telephones, wireless LAN or personal communication services. A dual modulus prescaler is integrated to provide either a 32/33 or 64/65 divide ratio. F o r additional applications information, two InterActiveApNoteTM documents containing software (based on a Microsoft Excel spreadsheet) and an Application Note are available. Please order DK305/D and DK306/D from the Motorola Literature Distribution Center.
MC12210
MECL PLL COMPONENTS SERIAL PLL FREQUENCY SYNTIESIZER
SEMICONDUCTOR TECHNICAL DATA
16 1
· · · · · · · · · · · ·
Low Power Supply Current of 8.8 mA Typical for ICC and 0.7 mA Typical for IP Supply Voltage of 2.7 to 5.5 V Dual Modulus Prescaler With Selectable Divide Ratios of 32/33 or 64/65 OnChip Reference Oscillator/Buffer Programmable Reference Divider Consisting of a Binary 14Bit Programmable Reference Counter Programmable Divider Consisting of a Binary 7Bit Swallow Counter and an 11Bit Programmable Counter Phase/Frequency Detector With Phase Conversion Function Balanced Charge Pump Outputs Dual Internal Charge Pumps for Bypassing the First Stage of the Loop Filter to Decrease Lock Time Outputs for External Charge Pump Operating Temperature Range of 40 to 85°C Space Efficient Plastic Surface Mount SOIC or TSSOP Packages
D SUFFIX PLASTIC PACKAGE CASE 751B (SO16)
20 1
DT SUFFIX PLASTIC PACKAGE CASE 948E (TSSOP20)
MOSAIC V, Mfax and InterActiveApNote are trademarks of Motorola, Inc. MAXIMUM RATINGS (Note 1) Parameter
Power Supply Voltage, Pin 4 (Pin 5 in 20lead package) Power Supply Voltage, Pin 3 (Pin 4 in 20lead package) Storage Temperature Range
Symbol
VCC Vp Tstg
Value
0.5 to 6.0 VCC to 6.0 65 to 150
Unit
Vdc Vdc °C Device MC12210D MC12210DT
ORDERING INFORMATION
Operating Temperature Range TA = 40° to +85°C Package SO16 TSSOP20
NOTES: 1. Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. 2. ESD data available upon request.
© Motorola, Inc. 1997
Rev 4
MC12210
R 16 P 15 fOUT BISW 14 13 FC 12 LE 11 DATA 10 CLK 9
Pinout: 16Lead Package (Top View)
1
2
3
4 VCC
5 Do FC 15
6 GND LE 14
7 LD DATA 13
8 fIN NC 12 CLK 11
OSCin OSCout VP R 20 NC 19 P 18
fOUT BISW 17 16
Pinout: 20Lead Package (Top View)
1 OSCin
2
3
4 VP
5 VCC
6 Do
7 GND
8 LD
9 NC
10 fIN
NC OSCout
PIN NAMES
Pin OSCin OSCout VP VCC Do GND LD fIN CLK DATA LE I/O I O -- -- O -- O I I I I Function Oscillator input. A crystal may be connected between OSCin and OSCout. It is highly recommended that an external source be ac coupled into this pin (see text). Oscillator output. Pin should be left open if external source is used Power supply for charge pumps (VP should be greater than or equal to VCC) VP provides power to the Do, BISW and P outputs Power supply voltage input. Bypass capacitors should be placed as close as possible to this pin and be connected directly to the ground plane. Internal charge pump output. Do remains on at all times Ground Lock detect, phase comparator output Prescaler input. The VCO signal is ACcoupled into this pin Clock input. Rising edge of the clock shifts data into the shift registers Binary serial data input Load enable input (with internal pull up resistor). When LE is HIGH or OPEN, data stored in the shift register is transferred into the appropriate latch (depending on the level of control bit). Also, when LE is HIGH or OPEN, the output of the second internal charge pump is connected to the BISW pin Phase control select (with internal pull up resistor). When FC is LOW, the characteristics of the phase comparator and charge pump are reversed. FC also selects fp or fr on the fOUT pin Analog switch output. When LE is HIGH or OPEN ("analog switch is ON") the output of the second charge pump is connected to the BISW pin. When LE is LOW, BISW is high impedance Phase comparator input signal. When FC is HIGH, fOUT=fr, programmable reference divider output; when FC is LOW, fOUT=fp, programmable divider output Output for external charge pump. Standard CMOS output level Output for external charge pump. Standard CMOS output level No connect 16Lead Pkg Pin No. 1 2 3 4 5 6 7 8 9 10 11 20Lead Pkg Pin No. 1 3 4 5 6 7 8 10 11 13 14
FC
I
12
15
BISW
O
13
16
fOUT P R NC
O O O --
14 15 16 --
17 18 20 2, 9, 12, 19
2
MOTOROLA RF/IF DEVICE DATA
MC12210
Figure 1. MC12210 Block Diagram
15BIT SHIFT REGISTER 15
15BIT LATCH 14 1
PROGRAMMABLE REFERENCE DIVIDER OSCin OSCout CRYSTAL OSCILLATOR 14BIT REFERENCE COUNTER fr PHASE/FREQUENCY DETECTOR CHARGE PUMP 1 LE LE DATA 7 CLK 7BIT LATCH 7 CONTROL BIT DATA 18BIT SHIFT REGISTER 11 DIVIDER OUTPUT MUX fOUT LD P R
FC
Do
CHARGE PUMP 2
BISW
11BIT LATCH 11
fIN
PRESCALER 32/33 or 64/65
PROGRAMMABLE DIVIDER 7BIT SWALLOW ACOUNTER 11BIT PROGRAMMABLE NCOUNTER
fp
CONTROL LOGIC
MOTOROLA RF/IF DEVICE DATA
3
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