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Part: MC145192DT
Category:
Communication
Description: Low-voltage 1.1 GHZ PLL Frequency Synthesizer
Company: Motorola Semiconductor Products
Datasheet: Download MC145192DT datasheet File size : 190 kB
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document by MC145192/D
Low-Voltage 1.1 GHz PLL Frequency Synthesizer
Includes OnBoard 64/65 Prescaler
The MC145192 is a lowvoltage singlepackage synthesizer with serial interface capable of direct usage up to 1.1 GHz. A special architecture makes this PLL very easy to program because a byteoriented format is utilized. Due to the patented BitGrabberTM registers, no address/steering bits are required for random access of the three registers. Thus, tuning can be accomplished via a 3byte serial transfer to the 24bit A register. The interface is both SPI and MICROWIRETM compatible. The device features a singleended current source/sink phase detector A output and a doubleended phase detector B output. Both phase detectors have linear transfer functions (no dead zones). The maximum current of the singleended phase detector output is determined by an external resistor tied from the Rx pin to ground. This current can be varied via the serial port. The MC145192 phase/frequency detector B R and V outputs can be p o w e r e d from 2.7 to 5.5 V. This is optimized for 3.0 V systems. The phase/frequency detector A PDout output must be powered from 4.5 to 5.5 V, and is optimized for a 5 volt supply. T h i s part includes a differential RF input which may be operated in a singleended mode. Also featured are onboard support of an external crystal and a programmable reference output. The R, A, and N counters are fully programmable. The C register (configuration register) allows the part to be configured to meet various applications. A patented feature allows the C register to shut off unused outputs, thereby minimizing system noise and interference. In order to have consistent lock times and prevent erroneous data from being loaded into the counters, onboard circuitry synchronizes the update of the A register if the A or N counters are loading. Similarly, an update of the R register is synchronized if the R counter is loading. The doublebuffered R register allows new divide ratios to be presented to the three counters (R, A, and N) simultaneously. · · · · · · · · · · · · · · · · · ·
20
MC145192
F SUFFIX SOG PACKAGE CASE 751J
1
20 1
DT SUFFIX TSSOP CASE 948D
ORDERING INFORMATION
MC145192F MC145192DT SOG Package TSSOP
PIN ASSIGNMENT
REFout LD R V VPD PDout GND Rx TEST 1 1 2 3 4 5 6 7 8 9 20 19 18 17 16 15 14 13 12 11 REFin DATA IN CLOCK ENABLE OUTPUT A OUTPUT B VDD TEST 2 VCC fin
Maximum Operating Frequency: 1100 MHz @ Vin = 200 mV pp fin 10 Operating Supply Current: 6 mA Nominal at 2.7 V Operating Supply Voltage Range (VDD and VCC Pins): 2.7 to 5.0 V Operating Supply Voltage Range of Phase Frequency Detector A (VPD Pin) = 4.5 to 5.5 V Operating Supply Voltage Range of Phase Detector B (VPD Pin) = 2.7 to 5.5 V Current Source/Sink Phase Detector Output Capability: 2 mA Maximum Gain of Current Source/Sink Phase/Frequency Detector Controllable via Serial Port Operating Temperature Range: 40° to 85°C R Counter Division Range: (1 and) 5 to 8191 N Counter Division Range: 5 to 4095 A Counter Division Range: 0 to 63 DualModulus Capability Provides Total Division up to 262,143 HighSpeed Serial Interface: 2 Megabits per Second Output A Pin, When Configured as Data Out, Permits Cascading of Devices Two GeneralPurpose Digital Outputs -- Output A: TotemPole (PushPull) with Four Output Modes Output B: OpenDrain PowerSaving Standby Feature with Patented Orderly Recovery for Minimizing Lock Times, Standby Current: 30 µA Evaluation Kit Available (Part Number MC145192EVK) See Application Note AN1253/D for LowPass Filter Design, and AN1277/D for Offset Reference PLLs for Fine Resolution or Fast Hopping
BitGrabber is a trademark of Motorola Inc. MICROWIRE is a trademark of National Semiconductor Corp.
REV 3 1/98 TN98012200
© OTOROLA MMotorola, Inc. 1998
MC145192 1
BLOCK DIAGRAM
DATA OUT REFin 20 OSC OR 4STAGE DIVIDER (CONFIGURABLE) 3 13STAGE R COUNTER fR PORT fV 13 DOUBLEBUFFERED BitGrabberTM R REGISTER 16 BITS SELECT LOGIC 16 OUTPUT A
REFout
1
LOCK DETECTOR AND CONTROL
2
LD
CLOCK DATA IN
18 19 SHIFT REGISTER AND CONTROL LOGIC BitGrabberTM C REGISTER 8 BITS
8 PHASE/FREQUENCY DETECTOR A AND CONTROL 6
Rx PDout
24
ENABLE
17
STANDBY LOGIC
POR 2 PHASE/FREQUENCY DETECTOR B AND CONTROL 3 R 4 V
BitGrabberTM A REGISTER 24 BITS INTERNAL CONTROL 6 4 6STAGE A COUNTER 12 12STAGE N COUNTER
15 OUTPUT B (OPENDRAIN OUTPUT)
fin fin
11 10 INPUT AMP 64/65 PRESCALER MODULUS CONTROL LOGIC 13 TEST 2 9 TEST 1
SUPPLY CONNECTIONS: PIN 12 = VCC (V+ TO INPUT AMP AND 64/65 PRESCALER) PIN 5 = VPD (V+ TO PHASE/FREQUENCY DETECTORS A AND B) PIN 14 = VDD (V+ TO BALANCE OF CIRCUIT) PIN 7 = GND (COMMON GROUND)
MAXIMUM RATINGS* (Voltages Referenced to GND, unless otherwise stated)
Symbol VCC, VDD VPD Vin Vout Parameter DC Supply Voltage (Pins 12 and 14) DC Supply Voltage (Pin 5) DC Input Voltage DC Output Voltage, except Output B, PDout, R, V Output B, PDout, R, V DC Input Current, per Pin (Includes VPD) DC Output Current, per Pin DC Supply Current, VDD and GND Pins Power Dissipation, per Package Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds Value 0.5 to + 6.0 VDD 0.5 to + 6.0 0.5 to VDD + 0.5 0.5 to VDD + 0.5 0.5 to VPD + 0.5 ± 10 ± 20 ± 30 300 65 to + 150 260 mA mA mA mW °C °C Unit V V V V This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this highimpedance circuit.
Iin, IPD Iout IDD PD Tstg TL
* Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the limits in the Electrical Characteristics tables or Pin Descriptions section.
MC145192 2
MOTOROLA
ELECTRICAL CHARACTERISTICS (VDD = VCC = 2.7 to 5.0 V, Voltages Referenced to GND, TA = 40° to 85°C, unless otherwise
Guaranteed Limit 0.2 x VDD 0.8 x VDD 100 300 0.1 VDD 0.1 0.25 0.36 0.6 1.0 0.25 0.36 0.35 ± 1.0 ± 150 ± 200 ± 10 30
stated; Phase/Frequency Detector A VPD = 4.5 to 5.5 V with VDD VPD; Phase/Frequency Detector B VPD = 2.7 to 5.5 V with VDD VPD) Symbol VIL VIH VHys VOL VOH IOL IOL IOL IOL IOH IOH IOH Iin Iin IOZ Parameter Maximum LowLevel Input Voltage (Data In, Clock, Enable, REFin) Minimum HighLevel Input Voltage (Data In, Clock, Enable, REFin) Minimum Hysteresis Voltage (Clock, Enable) Maximum LowLevel Output Voltage (REFout, Output A) Minimum HighLevel Output Voltage (REFout, Output A) Minimum LowLevel Output Current (REFout, LD) Minimum LowLevel Output Current (R, V) Minimum LowLevel Output Current (Output A) Minimum LowLevel Output Current (Output B) Minimum HighLevel Output Current (REFout, LD) Minimum HighLevel Output Current (R, V) Minimum HighLevel Output Current (Output A Only) Maximum Input Leakage Current (Data In, Clock, Enable, REFin) Maximum Input Current (REFin) Maximum Output Leakage Current Test Condition Device in Reference Mode, DC Coupled Device in Reference Mode, DC Coupled VDD = 2.7 V VDD = 5.0 V Iout = 20 µA, Device in Reference Mode Iout = 20 µA, Device in Reference Mode Vout = 0.4 V Vout = 0.4 V VDD, VPD = 2.7 V Vout = 0.4 V Vout = 0.4 V Vout = VDD 0.4 V Vout = VPD 0.4 V VDD, VPD = 2.7 V Vout = VDD 0.4 V Vin = VDD or GND, Device in XTAL Mode Vin = VDD or GND, Device in Reference Mode (PDout) Vout = VPD 0.5 V or 0.5 V, Output in HighImpedance State Unit V V mV V V mA mA mA mA mA mA mA µA µA nA µA µA
(Output B) Output in HighImpedance State ISTBY Maximum Standby Supply Current (VDD + VPD Pins) Maximum Phase Detector Quiescent Current (VPD Pin) Vin = VDD or GND; Outputs Open; Device in Standby Mode, ShutDown Crystal Mode or REFoutStaticLow Reference Mode; Output B Controlling VCC per Figure 22 Bit C6 = High Which Selects Phase Detector A, PDout = Open, PDout = Static Low or High, Bit C4 = Low Which is NOT Standby, IRx = 113 µA, VPD = 5.5 V Bit C6 = Low Which Selects Phase Detector B, R and V = Open, R and V = Static Low or High, Bit C4 = Low Which is NOT Standby IT Total Operating Supply Current (VDD + VPD + VCC Pins) fin = 1.1 GHz; REFin = 13 MHz @ 1 V pp; Output A = Inactive and No Connect; VDD = VCC, REFout, V, R, PDout, LD = No Connect; Data In, Enable, Clock = VDD or GND, Phase Detector A Off
IPD
600
µA
30
*
mA
* The nominal values are: 6 mA at VDD = 2.7 V and VPD = 2.7 V 9 mA at VDD = 5.0 V and VPD = 5.5 V These are not guaranteed limits.
MOTOROLA
MC145192 3
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