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Part: MC14519B
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Description:
Company: Motorola Semiconductor Products
Datasheet: Download MC14519B datasheet File size : 190 kB
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
MC14519B 4-Bit AND/OR Selector or Quad 2-Channel Data Selector or Quad Exclusive NOR" Gate
The MC14519B is constructed with MOS Pchannel and Nchannel enhancement mode devices in a monolithic structure. These complementary MOS logic gates find primary use where low power dissipation and/or high noise immunity is desired. This device provides three functions in one package; a 4Bit AND/OR Selector, a Quad 2Channel Data Selector, or a Quad Exclusive NOR Gate. · Diode Protection on All Inputs · Supply Voltage Range = 3.0 Vdc to 18 Vdc · Capable of Driving Two Lowpower TTL Loads or One Lowpower Schottky TTL Load Over the Rated Temperature Range · Plugin Replacement for CD4019 in Most Applications
L SUFFIX CERAMIC CASE 620
P SUFFIX PLASTIC CASE 648
D SUFFIX SOIC CASE 751B
ORDERING INFORMATION
MC14XXXBCP MC14XXXBCL MC14XXXBD Plastic Ceramic SOIC
LOGIC DIAGRAM
CONTROL INPUTS A B X0 Y0 X1 DATA INPUTS Y1 X2 Y2 9 14 6 7 4 5 2 3 13 Z3 12 Z2 11 Z1 10 Z0
TA = 55° to 125°C for all packages.
TRUTH TABLE
Control Inputs A 0 0 1 1 B 0 1 0 1 Output Zn 0 Yn Xn xn Yn
NOTE: Xn Yn means Xn (ExclusiveNOR) Yn
X3 15 Y3 1 VDD = PIN 16 VSS = PIN 8
REV 3 1/94
©MOTOROLA CMOS LOGIC DATA Motorola, Inc. 1995
MC14519B 1
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
MAXIMUM RATINGS* (Voltages Referenced to VSS)
Symbol VDD Parameter DC Supply Voltage Value Unit V V 0.5 to + 18.0 Vin, Vout Iin, Iout PD Tstg TL Input or Output Voltage (DC or Transient) 0.5 to VDD + 0.5 ± 10 500 65 to + 150 260 Input or Output Current (DC or Transient), per Pin Power Dissipation, per Package Storage Temperature Lead Temperature (8Second Soldering) mA mW
PIN ASSIGNMENT
Y3 X2 Y2 X1 Y1 X0 Y0 VSS 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VDD X3 B Z3 Z2 Z1 Z0 A
_C _C
* Maximum Ratings are those values beyond which damage to the device may occur. Temperature Derating: Plastic "P and D/DW" Packages: 7.0 mW/_C From 65_C To 125_C Ceramic "L" Packages: 12 mW/_C From 100_C To 125_C
ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS)
Characteristic Symbol VOL VDD Vdc 5.0 10 15 5.0 10 15 5.0 10 15 VIH 5.0 10 15 IOH Source 5.0 5.0 10 15 IOL 5.0 10 15 15 -- 5.0 10 15 5.0 10 15 3.0 0.64 1.6 4.2 0.64 1.6 4.2 -- -- -- -- -- 3.5 7.0 11 Min -- -- --
55_C
25_C
125_C
Max
Min -- -- --
Typ # 0 0 0
Max
Min -- -- --
Max
Unit Vdc
Output Voltage Vin = VDD or 0
"0" Level
0.05 0.05 0.05 -- -- -- 1.5 3.0 4.0 -- -- -- -- -- -- -- -- -- --
0.05 0.05 0.05 -- -- -- 1.5 3.0 4.0 -- -- -- -- -- -- -- -- -- --
0.05 0.05 0.05 -- -- -- 1.5 3.0 4.0
"1" Level "1" Vin = 0 or VDD Input Voltage "0" Level (VO = 4.5 or 0.5 Vdc) (VO = 9.0 or 1.0 Vdc) (VO = 13.5 or 1.5 Vdc) "1" Level (VO = 0.5 or 4.5 Vdc) (VO = 1.0 or 9.0 Vdc) (VO = 1.5 or 13.5 Vdc) Output Drive Current (VOH = 2.5 Vdc) (VOH = 4.6 Vdc) (VOH = 9.5 Vdc) (VOH = 13.5 Vdc) (VOL = 0.4 Vdc) (VOL = 0.5 Vdc) (VOL = 1.5 Vdc) Input Current Input Capacitance (Vin = 0) Quiescent Current (Per Package) Total Supply Current** (Dynamic plus Quiescent, Per Package) (CL = 50 pF on all outputs, all buffers switching)
VOH
4.95 9.95 14.95 -- -- --
4.95 9.95 14.95 -- -- -- 3.5 7.0 11 2.4 0.51 1.3 3.4 0.51 1.3 3.4 -- -- -- -- --
5.0 10 15 2.25 4.50 6.75 2.75 5.50 8.25 4.2 0.88 2.25 8.8 0.88 2.25 8.8 ± 0.00001 5.0 0.005 0.010 0.015
4.95 9.95 14.95 -- -- -- 3.5 7.0 11 1.7 0.36 0.9 2.4 0.36 0.9 2.4 -- -- -- -- --
Vdc
VIL
Vdc
Vdc -- -- -- mAdc -- -- -- -- -- -- -- ± 1.0 -- 150 300 600 mAdc
Sink
Iin Cin IDD
± 0.1 -- 5.0 10 20
± 0.1 7.5 5.0 10 20
µAdc pF µAdc
IT
IT = (1.2 µA/kHz) f + IDD IT = (2.4 µA/kHz) f + IDD IT = (3.6 µA/kHz) f + IDD
µAdc
# Data labelled "Typ" is not to be used for design purposes but is intended as an indication of the IC's potential performance. ** The formulas given are for the typical characteristics only at 25_C. To calculate total supply current at loads other than 50 pF: IT(CL) = IT(50 pF) + (CL 50) Vfk where: IT is in µA (per package), CL in pF, V = (VDD VSS) in volts, f in kHz is input frequency, and k = 0.004.
MC14519B 2
MOTOROLA CMOS LOGIC DATA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
SWITCHING CHARACTERISTICS* (CL = 50 pF, TA = 25_C)
Characteristic Output Rise and Fall Time tTLH, tTHL = (1.5 ns/pF) CL + 25 ns tTLH, tTHL = (0.75 ns/pF) CL + 12.5 ns tTLH, tTHL = (0.55 ns/pF) CL + 9.5 ns Propagation Delay Time tPLH, tPHL = (1.7 ns/pF) CL + 165 ns tPLH, tPHL = (0.66 ns/pF) CL + 82 tPLH, tPHL = (0.5 ns/pF) CL + 65 ns Symbol tTLH, tTHL VDD 5.0 10 15 5.0 10 15 Min -- -- -- -- -- -- Typ # 100 50 40 250 115 90 Max 200 100 80 500 225 165 Unit ns tPLH, tPHL ns * The formulas given are for the typical characteristics only at 25_C. # Data labelled "Typ" is not to be used for design purposes but is intended as an indication of the IC's potential performance. +VDD VDD PULSE GENERATOR Vin A B X0 Y0 X1 Y1 X2 Y2 X3 Y3 VSS Z3 CL Z2 CL Z1 CL Vin 90% 10% 50% DUTY CYCLE Z0 CL 20 ns 20 ns VDD VSS ISS 500 µF
Figure 1. Dynamic Power Dissipation Test Circuit and Waveform
VDD 20 ns PULSE GENERATOR V A DD Z0 B X0 Z1 Y0 X1 Y1 Z2 X2 Y2 X3 Y3 V Z3 SS CL CL OUTPUTS CL tPLH CL OUTPUT 50% VOL OUTPUT INPUT tPHL 90% 50% 10% tTHL tTLH tPHL VOH 90% 50% 10% tPLH 20 ns VDD VSS VOH VOL
Figure 2. Switching Time Test Circuit and Waveforms
MOTOROLA CMOS LOGIC DATA
MC14519B 3
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