Details, datasheet, quote on part number: MC33984
DescriptionDual Intelligent High-current Self-protected Silicon High-side Switch
CompanyMotorola Semiconductor Products
DatasheetDownload MC33984 datasheet
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Features, Applications

Preliminary Information Dual Intelligent High-Current Self-Protected Silicon High-Side Switch (4.0 m)

The is a dual self-protected 4.0 m silicon switch used to replace electromechanical relays, fuses, and discrete devices in power management applications. The 33984 is designed for harsh environments, and it includes self-recovery features. The device is suitable for loads with high inrush current, as well as motors and all types of resistive and inductive loads.

Programming, control, and diagnostics are implemented via the Serial Peripheral Interface (SPI). A dedicated parallel input is available for alternate and Pulse Width Modulation (PWM) control of each output. SPIprogrammable fault trip thresholds allow the device to be adjusted for optimal performance in the application. The 33984 is packaged in a power-enhanced x 12 PQFN package with exposed tabs. Features Dual 4.0 m Max High-Side Switch with Parallel Input or SPI Control 27 V Operating Voltage with Standby Currents < 5.0 A Output Current Monitoring Output with Two SPI-Selectable Current Ratios SPI Control of Overcurrent Limit, Overcurrent Fault Blanking Time, Output-OFF Open Load Detection, Output ON/OFF Control, Watchdog Timeout, Slew Rates, and Fault Status Reporting SPI Status Reporting of Overcurrent, Open and Shorted Loads, Overtemperature, Undervoltage and Overvoltage Shutdown, Fail-Safe Pin Status, and Program Status. Enhanced 16 V Reverse Polarity VPWR Protection

Device PC33984PNA/R2 Temperature Range (TA) to 125C Package 16 PQFN
Simplified Application Diagram 33984 Simplified Application Diagram

This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice. Motorola, Inc. 2004

Overvoltage Protection Selectable Slew Rate Gate Drive

Selectable Overcurrent Detection High 75 A Logic Selectable Current Detection Time ms155 ms Open Load Detection Overtemperature Detection Selectable Overcurrent Detection Low 25 A


Terminal 1 Terminal Name CSNS Formal Name Output Current Monitoring Definition This terminal is used to output a current proportional to the designated HS0-1 output. That current is fed into a ground-referenced resistor and its voltage is monitored by an MCU's A/D. The channel to be monitored is selected via the SPI. This terminal can be tri-stated through SPI. This terminal is used to input a logic [1] signal as to enable the watchdog timer function. An internal clamp protects this terminal from high damaging voltages when the output is current limited with an external resistor. This input has an internal passive pulldown. This input terminal is used to initialize the device configuration and fault registers, as well as place the device in a low current sleep mode. The terminal also starts the watchdog timer when transitioning from logic LOW to logic HIGH. This terminal should not be allowed to be logic HIGH until VDD is in regulation. This terminal has an internal passive pull-down. This input terminal is used to directly control the output HS0. This input has an internal active pull-down and requires CMOS logic levels. This input may be configured via SPI. This is an open drain configured output requiring an external pull-up resistor to VDD for fault reporting. When a device fault condition is detected, this terminal is active LOW. Specific device diagnostic faults are reported via the SPI SO terminal. The value of the resistance connected between this terminal and ground determines the state of the outputs after a watchdog timeout occurs. Depending on the resistance value, either all outputs are OFF, ON, or the output HSO only is ON. When the FSI terminal is connected to GND, the watchdog circuit and fail-safe operation are disabled. This terminal incorporates an active internal pull-up. This input terminal is connected to a chip select output of a master microcontroller (MCU). The MCU determines which device is addressed (selected) to receive data by pulling the CS terminal of the selected device logic LOW, enabling SPI communication with the device. Other unselected devices on the serial link having their CS terminals pulled-up logic HIGH disregard the SPI communication data sent. This input terminal is connected to the MCU providing the required bit shift clock for SPI communication. It transitions one time per bit transferred at an operating frequency, fSPI, defined by the communication interface.The 50 percent duty cycle CMOS-level serial clock signal is idle between command transfers. The signal is used to shift data into and out of the device.

Serial Input Fault Status (Active Low)


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