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Part: EM064U16
Category:
Memory
-> SRAM
-> Low Power
-> Ultra-low Power SRAMs
Description: 1Mb, , 64Kb X 16, 1.65 - 2.2, 70, Dual CE, 44-TSOP2, 48-BGA,
Company: NanoAmp Solutions, Inc.
Datasheet: Download EM064U16 datasheet File size : 45 kB
Request For quote: Find where to buy EM064U16
Datasheet text preview:
NanoAmp Solutions, Inc. 1982 Zanker Road, San Jose, CA 95112 ph: 408-573-8878, FAX: 408-573-8877 www.nanoamp.com
N01L 1618N1A
1Mb Ultra-Low Power Asynchronous CMOS SRAM
64Kx16 bit Overview
The N01L1618N1A is an integrated memory device containing a 1 Mbit Static Random Access Memory organized as 65,536 words by 16 bits. The device is designed and fabricated using NanoAmp's advanced CMOS technology to provide both high-speed performance and ultra-low power. The base design is the same as NanoAmp's N01L163WN1A, which is processed to operate at higher voltages. The device operates with a single chip enable (CE) control and output enable (OE) to allow for easy memory expansion. Byte controls (UB and LB) allow the upper and lower bytes to be accessed independently. The N01L1618N1A is optimal for various applications where low-power is critical such as battery backup and hand-held devices. The device can operate over a very wide temperature range of -40oC to +85oC and is available in JEDEC standard packages compatible with other standard 64Kb x 16 SRAMs.
Features
· Single Wide Power Supply Range 1.65 to 2.2 Volts · Very low standby current 0.5µA at 1.8V (Typical) · Very low operating current 0.7mA at 1.8V and 1µs (Typical) · Very low Page Mode operating current 0.5mA at 1.8V and 1µs (Typical) · Simple memory control Single Chip Enable (CE) Byte control for independent byte operation Output Enable (OE) for memory expansion · Low voltage data retention Vcc = 1.2V · Very fast output enable access time 30ns OE access time · Automatic power down to standby mode · TTL compatible three-state output driver · Compact space saving BGA package available
Product Family
Part Number N01L1618N1AB Package Type 48 - BGA Operating Temperature -40oC to +85oC Power Supply (Vcc) 1.65V - 2.2V Speed 70ns @ 1.8V 85ns @ 1.65V Standby Operating Current (ISB), Current (Icc), Max Max 10 µA 3 mA @ 1MHz
N01L1618N1AT 44 - TSOP II
Pin Configurations
A4 A3 A2 A1 A0 CE I/ O0 I/ O1 I/O2 I/O3 VCC VSS I/O4 I/O5 I/O6 I/O7 WE A15 A14 A13 A12 NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 PIN ONE 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A5 A6 A7 OE UB LB I/O15 I/O14 I/O13 I/O12 VSS V CC I/O11 I/O10 I/O9 I/O8 NC A8 A9 A10 A11 NC
Pin Descriptions
1 A B C D E F G H
LB I/O8 I/O9 V SS V CC
2
OE UB I/O10 I/O11 I/O12
3
A0 A3 A5 NC NC A1 4 A1 2 A9
4
A1 A4 A6 A7 NC A15 A13 A10
5
A2 CE I/O1 I/O3 I/O4 I/O5 WE A11
6
NC I/O0 I/O2 VCC V SS I/O6 I/O7 NC
Pin Name A0-A15 WE CE OE LB UB I/O0-I/O15 NC VCC VSS
Pin Function Address Inputs Write Enable Input Chip Enable Input Output Enable Input Lower Byte Enable Input Upper Byte Enable Input Data Inputs/Outputs Not Connected P ower G r ound
N01L1618N1A TSOP
I/O14 I/O13 I/O15 NC NC A8
48 Pin BGA (top) 6 x 8 mm
Stock No. 23131-03 1/02 The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
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NanoAmp Solutions, Inc. Functional Block Diagram Address Inputs A0 - A3 Word Address Decode Logic
N01L 1618N1A
Address Inputs A4 - A15
Page Address Decode Logic
4K Page x 16 word x 16 bit RAM Array
Input/ Output Mux and Buffers
Word Mux
I/O0 - I/O7
I/O8 - I/O15 CE WE OE UB LB
Control Logic
Functional Description
CE H L L L L WE X X L H H OE X X X3 L H UB X H L1 L1 L1 LB X H L1 L1 L1 I/O0 - I/O151 High Z High Z Data In Data Out Hi g h Z MODE Standby2 Active Write3 Read Active POWER Standby Active Active -> Standby4 Active -> Standby4 Standby4
1. When UB and LB are in select mode (low), I/O0 - I/O15 are affected as shown. When LB only is in the select mode only I/O0 - I/O7 are affected as shown. When UB is in the select mode only I/O8 - I/O15 are affected as shown. 2. When the device is in standby mode, control inputs (WE, OE, UB, and LB), address inputs and data input/outputs are internally isolated from any external influence and disabled from exerting any influence externally. 3. When WE is invoked, the OE input is internally disabled and has no effect on the circuit. 4. The device will consume active power in this mode whenever addresses are changed. Data inputs are internally isolated from any external influence.
Capacitance1
Item Input Capacitance I/O Capacitance Symbol CIN CI/O Test Condition VIN = 0V, f = 1 MHz, TA = 25oC VIN = 0V, f = 1 MHz, TA = 25oC Min Max 8 8 Unit pF pF
1. These parameters are verified in device characterization and are not 100% tested
Stock No. 23131-03 1/02 The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
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NanoAmp Solutions, Inc. Absolute Maximum Ratings1
Item Voltage on any pin relative to VSS Voltage on VCC Supply Relative to VSS Power Dissipation Storage Temperature Operating Temperature Soldering Temperature and Time Symbol VIN,OUT VCC PD TSTG TA TSOLDER 240oC,
N01L 1618N1A
Rating 0.3 to VCC+0.3 0.3 to 3.0 500 40 to 125 -40 to +85 10sec(Lead only) Unit V V mW
o
C
oC oC
1. Stresses greater than those listed above may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Operating Characteristics (Over Specified Temperature Range)
Item Supply Voltage Data Retention Voltage Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Input Leakage Current Output Leakage Current Read/Write Operating Supply Current @ 1 µs Cycle Time2 Read/Write Operating Supply Current @ 85 ns Cycle Time2 Page Mode Operating Supply Current @ 85ns Cycle Time2 (Refer to Power Savings with Page Mode Operation diagram) Read/Write Quiescent Operating Supply Current3 Symbol VCC VDR VIH VIL VOH VOL ILI ILO ICC1 ICC2 IOH = 0.2mA IOL = -0.2mA VIN = 0 to VCC OE = VIH or Chip Disabled VCC=2.2 V, VIN=VIH or VIL Chip Enabled, IOUT = 0 VCC=2.2 V, VIN=VIH or VIL Chip Enabled, IOUT = 0 VCC=2.2 V, VIN=VIH or VIL Chip Enabled, IOUT = 0, VCC=2.2 V, VIN=VIH or VIL Chip Enabled, IOUT = 0, f=0 VIN = VCC or 0V Chip Disabled tA= 85oC, VCC = 2.2 V VCC = 1.2V, VIN = VCC or 0 Chip Disabled, tA= 85oC 0.5 0.7 8 Chip Disabled
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Test Conditions
Min. 1.65 1.2 0.7VCC 0.3 VCC0.3
Typ1 1.8
Max 2.2 VCC+0.3 0.3VCC 0.3 0.5 0.5 3.0 16
Unit V V V V V V µA µA mA mA
ICC3
3
mA
ICC4
20
µA
Maximum Standby
Current3
I SB1
10
µA
Maximum Data Retention Current3
IDR
5
µA
1. Typical values are measured at Vcc=Vcc Typ., TA=25°C and are not 100% tested. 2. This parameter is specified with the outputs disabled to avoid external loading effects. The user must add current required to drive output capacitance expected in the actual system. 3. This device assumes a standby mode if the chip is disabled (CE high). In order to achieve low standby current all inputs must be within 0.2 volts of either VCC or VSS
Stock No. 23131-03 1/02 The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
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NanoAmp Solutions, Inc. Power Savings with Page Mode Operation (WE = VIH)
N01L 1618N1A
Page Address (A4 - A15 )
Open page ...
Word Address (A0 - A3)
Word 1
Word 2
Word 16
CE
OE LB, UB
Note: Page mode operation is a method of addressing the SRAM to save operating current. The internal organization of the SRAM is optimized to allow this unique operating mode to be used as a valuable power saving feature. The only thing that needs to be done is to address the SRAM in a manner that the internal page is left open and 16-bit words of data are read from the open page. By treating addresses A0-A3 as the least significant bits and addressing the 16 words within the open page, power is reduced to the page mode value which is considerably lower than standard operating currents for low power SRAMs.
Stock No. 23131-03 1/02 The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
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NanoAmp Solutions, Inc. Timing Test Conditions
Item Input Pulse Level Input Rise and Fall Time Input and Output Timing Reference Levels Output Load Operating Temperature
N01L 1618N1A
0.1VCC to 0.9 VCC 5ns 0.5 VCC CL = 30pF -40 to +85 oC
Timing
Item Read Cycle Time Address Access Time Chip Enable to Valid Output Output Enable to Valid Output Byte Select to Valid Output Chip Enable to Low-Z output Output Enable to Low-Z Output Byte Select to Low-Z Output Chip Disable to High-Z Output Output Disable to High-Z Output Byte Select Disable to High-Z Output Output Hold from Address Change Write Cycle Time Chip Enable to End of Write Address Valid to End of Write Byte Select to End of Write Write Pulse Width Address Setup Time Write Recovery Time Write to High-Z Output Data to Write Time Overlap Data Hold from Write Time End Write to Low-Z Output Symbol tRC t AA tCO tOE tLB, tUB tLZ tOLZ tLBZ, tUBZ tHZ tOHZ tLBHZ, tUBHZ tOH tWC tCW tAW tLBW, tUBW tWP t AS tWR tWHZ tDW tDH tOW 40 0 10 5 85 50 50 50 50 0 0 25 35 0 10 10 5 10 30 30 30 5 70 40 40 40 40 0 0 20 1.65 - 2.2 V Min. 85 85 85 35 30 10 5 10 25 25 25 Max. 1.8 - 2.2 V Min. 70 70 70 30 25 Max. Units ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
Stock No. 23131-03 1/02 The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
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