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Part: 5962-9164001MFA
Category:
Interface and Interconnect
-> RS-422/RS-423
Description: DS26C32AM - CMOS Quad Differential Line Receivers, Package: Lcc, Pin Nb=20
Company: National Semiconductor Corporation
Datasheet: Download 5962-9164001MFA datasheet File size : 456 kB
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Datasheet text preview:
DS26C32AT/DS26C32AM Quad Differential Line Receiver
June 1998
DS26C32AT/DS26C32AM Quad Differential Line Receiver
General Description
The DS26C32A is a quad differential line receiver designed to meet the RS-422, RS-423, and Federal Standards 1020 and 1030 for balanced and unbalanced digital data transmission, while retaining the low power characteristics of CMOS. The DS26C32A has an input sensitivity of 200 mV over the common mode input voltage range of ± 7V. The DS26C32A features internal pull-up and pull-down resistors which prevent output oscillation on unused channels. The DS26C32A provides an enable and disable function common to all four receivers, and features TRI-STATE ® outputs with 6 mA source and sink capability. This product is pin compatible with the DS26LS32A and the AM26LS32.
Features
n CMOS design for low power n ± 0.2V sensitivity over input common mode voltage range n Typical propagation delays: 19 ns n Typical input hysteresis: 60 mV n Inputs won't load line when VCC = 0V n Meets the requirements of EIA standard RS-422 n TRI-STATE outputs for connection to system buses n Available in Surface Mount n Mil-Std-883C compliant
Logic Diagram
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Connection Diagrams
Dual-In-Line Package 20-Lead Ceramic Leadless Chip Carrier
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Top View Order Number DS26C32ATM or DS26C32ATN See NS Package M16A or N16E For Complete Military Product Specifications, refer to the appropriate SMD or MDS. Order Number DS26C32AME/883, DS26C32AMJ/883 or DS26C32AMW/883 See NS Package E20A, J16A or W16A
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TRI-STATE ® is a registered trademark of National Semiconductor Corporation.
© 1998 National Semiconductor Corporation
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Absolute Maximum Ratings (Notes 2, 1)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VCC) Common Mode Range (VCM) Differential Input Voltage (V DIFF) Enable Input Voltage (V IN) -65°C Storage Temperature Range (T STG) Lead Temperature (Soldering 4 sec.) Maximum Power Dissipation at 25°C (Note 5) Ceramic "J" Pkg. Plastic "N" Pkg. SOIC "M" Pkg. 7V
Ceramic "E" Pkg. 2108 mW Ceramic "W" Pkg. 1215 mW ± 25 mA Maximum Current Per Output This device does not meet 2000V ESD rating. (Note 4)
± 14V ± 14V
7V to +150°C 260°C 2308 mW 1645 mW 1190 mW
Operating Conditions
Supply Voltage (VCC) Operating Temperature Range (TA) DS26C32AT DS26C32AM Enable Input Rise or Fall Times Min 4.50 -40 -55 Max 5.50 +85 +125 500 Units V °C °C ns
DC Electrical Characteristics
VCC = 5V ± 10% (unless otherwise specified) (Note 1) Symbol VTH RIN IIN Parameter Minimum Differential Input Voltage Input Resistance Input Current V
OUT
Conditions = VOH or VOL DS26C32AT DS26C32AM DS26C32AT DS26C32AM DS26C32AT DS26C32AM
Min -200 5.0 4.5
Typ 35 6.8 6.8 +1.1 +1.1 -2.0 -2.0
Max +200 10 11 +1.5 +1.8 -2.5 -2.7
Units mV k k mA mA mA mA V
-7V < VCM < +7V VIN = -7V, +7V (Other Input = GND) VIN = +10V, Other Input = GND VIN = -10V, Other Input = GND V CC = Min, VDIFF = +1V I OUT = -6.0 mA V I
CC
VOH VOL VIH VIL IOZ
Minimum High Level Output Voltage Maximum Low Level Output Voltage Minimum Enable High Input Level Voltage Maximum Enable Low Input Level Voltage Maximum TRI-STATE ® Output Leakage Current
3.8
4.2 0.2 0.3
OUT
= Max, VDIFF = -1V = 6.0 mA 2.0
V V
0.8 V OUT = VCC or GND, ENABLE = VIL, ENABLE = VIH V
IN
V
± 0.5
± 5.0 ± 1.0
µA µA mA mA mV
II ICC VHYST
Maximum Enable Input Current Quiescent Power Supply Current Input Hysteresis
= VCC or GND DS26C32AT DS26C32AM 16 16 60
VCC = Max, VDIF = +1V V CM = 0V
23 25
AC Electrical Characteristics
VCC = 5V ± 10% (Note 3) Symbol tPLH, tPHL Parameter Propagation Delay Input to Output Conditions CL = 50 pF VDIFF = 2.5V VCM = 0V 10 19 30 35 ns Min Typ DS26C32AT Max DS26C32AM Units
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2
AC Electrical Characteristics
VCC = 5V ± 10% (Note 3) Symbol tRISE, tFALL tPLZ, tPHZ tPZL, tPZH Parameter Output Rise and Fall Times Propagation Delay ENABLE to Output Propagation Delay ENABLE to Output
(Continued)
Conditions CL = 50 pF VDIFF = 2.5V VCM = 0V CL = 50 pF RL = 1000 VDIFF = 2.5V CL = 50 pF RL = 1000 VDIFF = 2.5V
Min
Typ DS26C32AT 4 9
Max DS26C32AM 9
Units
ns
13
22
29
ns
13
23
29
ns
Note 1: Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the device should be operated at these limits. The table of "Electrical Characteristics" provides conditions for actual device operation. Note 2: Unless otherwise specified, all voltages are referenced to ground. Note 3: Unless otherwise specified, Min/Max limits apply over recommended operating conditions. All typicals are given for VCC = 5V and TA = 25°C. Note 4: ESD Rating: HBM (1.5 k, 100 pF) Inputs 2000V All other pins 1000V EIAJ (0, 200 pF) 350V Note 5: Ratings apply to ambient temperature at 25°C. Above this temperature derate N Package 13.16 mW/°C, J Package 15.38 mW/°C, M Package 9.52 mW/°C, E Package 12.04 mW/°C, and W package 6.94 mW/°C.
Comparison Table of Switching Characteristics into "LS-Type" Load
(Figures 4, 5, 6) (Note 6) Symbol tPLH tPHL tLZ tHZ tZL tZH ENABLE to Output CL = 15 pF ENABLE to Output CL = 5 pF Parameter Input to Output Conditions CL = 15 pF DS26C32A Typ 17 19 13 12 13 13 DS26LS32A Typ 23 23 15 20 14 15 ns ns ns ns ns ns Units
Note 6: This table is provided for comparison purposes only. The values in this table for the DS26C32A reflect the performance of the device, but are not tested or guaranteed.
Test and Switching Waveforms
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FIGURE 1. Propagation Delay
3
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Test and Switching Waveforms
(Continued)
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CL includes load and test jig capacitance. S1 = VCC for t PZL, and tPLZ measurements. S1 = Gnd for tPZH and tPHZ measurements.
FIGURE 2. Test Circuit for TRI-STATE Output Tests
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FIGURE 3. TRI-STATE ® Output Enable and Disable Waveforms
AC Test Circuit and Switching Time Waveforms
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FIGURE 4. Load Test Circuit for TRI-STATE Outputs for "LS-Type" Load
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FIGURE 5. Propagation Delay for "LS-Type" Load (Notes 7, 9)
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4
AC Test Circuit and Switching Time Waveforms
(Continued)
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FIGURE 6. Enable and Disable Times for "LS-Type" Load (Notes 8, 9)
Note 7: Diagram shown for ENABLE low. Note 8: S1 and S2 of load circuit are closed except where shown. Note 9: Pulse generator for all pulses: Rate 1.0 MHz; ZO = 50; tr 15 ns; t f 6.0 ns.
Truth Table
ENABLE L ENABLE H VID V VID V Input X
TH TH
Output Z H L H
All Other Combinations of Enable Inputs
Z = TRI-STATE
(Max) (Min)
Open
Typical Applications
Two-Wire Balanced Systems, RS-422
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Typical Performance Characteristics
Differential Propagation Delay vs Temperature Differential Propagation Delay vs Power Supply Voltage Differential Skew vs Temperature
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5
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