The a 6-bit register with a buffered common Enable This device is similar to the 'F174 but with common Enable rather than common Master Reset
Features
6-bit high-speed parallel register Positive edge-triggered D-type inputs Fully buffered common clock and enable inputs Input clamp diodes limit high-speed termination effects Full TTL and CMOS compatible
Package Description (0 300 Wide) Molded Dual-In-Line 16-Lead Ceramic Dual-In-Line (0 150 Wide) Molded Small Outline JEDEC (0 300 Wide) Molded Small Outline EIAJ 16-Lead Cerpack 20-Lead Ceramic Leadless Chip Carrier Type C
Note 1 Devices also available in 13 reel Use suffix e SCX and SJX
TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation
Enable Input (Active LOW) Data Inputs Clock Pulse Input (Active Rising Edge) Outputs
The 'F378 consists of six edge-triggered D-type flip-flops with individual D inputs and Q inputs The Clock (CP) and Enable (E) inputs are common to all flip-flops When the E input is LOW new data is entered into the register on the LOW-to-HIGH transition of the CP input When the E input is HIGH the register will retain the present data independent of the CP input
H e HIGH Voltage Level L e LOW Voltage Level X e Immaterial L e LOW-to-HIGH Clock Transition
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays
If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias Plastic VCC Pin Potential to Ground Pin Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC e 0V) Standard Output TRI-STATE Output Current Applied to Output in LOW State (Max)
Free Air Ambient Temperature Military Commercial Supply Voltage Military Commercial
Note 1 Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired Functional operation under these conditions is not implied Note 2 Either voltage limit or current limit is sufficient to protect inputs
Symbol VIH VIL VCD VOH Parameter Min Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Current Input HIGH Current Breakdown Test Output HIGH Leakage Current Input Leakage Test Output Leakage Circuit Current Input LOW Current Output Short-Circuit Current Power Supply Current
Conditions Recognized as a HIGH Signal Recognized as a LOW Signal
IIN b18 mA IOH b1 mA IOH b1 mA IOH b1 mA IOL 20 mA IOL 20 mA VIN 2 7V VIN 7 0V VOUT e VCC IID 9 mA All Other Pins Grounded VIOD 150 mV All Other Pins Grounded VIN 0 5V VOUT VO e LOW
|
