|Category||Logic => Registers => Bipolar->F Family|
|Description||Register Stack-16x4 RAM Tri-state(tm) Output Register|
|Company||National Semiconductor Corporation|
|Datasheet||Download 74F410 datasheet
The is a register-oriented high-speed 64-bit Read Write Memory organized 4-bits An edgetriggered 4-bit output register allows new input data to be written while previous data is held TRI-STATE outputs are provided for maximum versatility The 'F410 is fully compatible with all TTL familiesFeatures
Edge-triggered output register Typical access time 35 ns TRI-STATE outputs Optimized for register stack operation 18-pin package 9410 replacement
Package Description (0 300 Wide) Molded Dual-In-Line 18-Lead Ceramic Dual-In-Line (0 300 Wide) Molded Small Outline JEDEC 20-Lead CerpakNote 1 Military grade device with environmental and burn-in processing Use suffix e DMQB LMQB
TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation 9538 RRD-B30M105 Printed S A
Address Inputs Data Inputs Chip Select Input (Active LOW) Output Enable Input (Active LOW) Write Enable Input (Active LOW) Clock Input (Outputs Change on LOW-to-HIGH Transition) TRI-STATE Outputs
Write Operation When the three control inputs Write Enable (WE) Chip Select (CS) and Clock (CP) are LOW the information on the data inputs D3) is written into the memory location selected by the address inputs A3) If the input data changes while WE CS and CP are LOW the contents of the selected memory location follow these changes provided setup and hold time criteria are met Read Operation Whenever CS is LOW and CP goes from LOW-to-HIGH the contents of the memory location selected by the address inputs (A0 A3) are edge-triggered into the Output Register The (OE) input controls the output buffers When OE is HIGH the four outputs (Q0 Q3) are in a high impedance or OFF state when OE is LOW the outputs are determined by the state of the Output Register
If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias Plastic VCC Pin Potential to Ground Pin Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC e 0V) Standard Output TRI-STATE Output Current Applied to Output in LOW State (Max)Free Air Ambient Temperature Military Commercial Supply Voltage Military Commercial
Note 1 Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired Functional operation under these conditions is not implied Note 2 Either voltage limit or current limit is sufficient to protect inputs
Symbol VIH VIL VCD VOH Parameter Min Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage 54F 10% VCC 54F 10% VCC 74F 10% VCC 74F 10% VCC 74F 5% VCC 54F 10% VCC 74F 10% VCC 54F 74FConditions Recognized as a HIGH Signal Recognized as a LOW Signal
Output LOW Voltage Input HIGH Current Input HIGH Current Breakdown Test Output HIGH Leakage Current Input Leakage Test Output Leakage Circuit Current Input LOW Current
IOL 20 mA IOL 24 mA VIN 2 7V VIN 7 0V VOUT e VCC IID 9 mA All Other Pins Grounded VIOD 150 mV All Other Pins Grounded VIN 0 5V (An Dn OE WE) VIN 0 5V (CS CP) VOUT 2 7V VOUT 0 5V VOUT e 0V VOUT 5 25VOutput Leakage Current Output Leakage Current Output Short-Circuit Current Bus Drainage Test
|Some Part number from the same manufacture National Semiconductor Corporation|
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