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Part: 93L14DMQB
Category:
Description: 93L14 - Quad Latch Life-time Buy , Package: Cerdip, Pin Nb=16
Company: National Semiconductor Corporation
Datasheet: Download 93L14DMQB datasheet File size : 147 kB
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Datasheet text preview:
93L14 Quad Latch
June 1989
93L14 Quad Latch
General Description
The 93L14 is a multifunctional 4-bit latch designed for general purpose storage applications in high speed digital systems All outputs have active pull-up circuitry to provide high capacitance drive and to provide low impedance in both logic states for good noise immunity
Y Y Y
eatures
Can be used as single input D latches or set reset latches Active low enable gate input Overriding master reset
F
Connection Diagram
Dual-In-Line Package
Logic Symbol
TL F 9612 2
VCC e Pin 16 GND e Pin 8
TL F 9612 1
Order Number 93L14DMQB or 93L14FMQB See NS Package Number J16A or W16A
Pin Names E D0 D3 S0 S3 MR Q0 Q3
Description Enable Input (Active LOW) Data Inputs Set Inputs (Active LOW) Master Reset Input (Active LOW) Latch Outputs
C1995 National Semiconductor Corporation
TL F 9612
RRD-B30M105 Printed in U S A
Absolute Maximum Ratings (Note)
p If Military Aerospace specified devices are required lease contact the National Semiconductor Sales S Office Distributors for availability and specifications upply Voltage Input Voltage 7V 5 5V Note The ``Absolute Maximum Ratings'' are those values beyond which the safety of the device cannot be guaranteed The device should not be operated at these limits The parametric values defined in the ``Electrical Characteristics'' table are not guaranteed at the absolute maximum ratings T he ``Recommended Operating Conditions'' table will define the conditions for actual device operation
Operating Free Air Temperature Range R b 55 C to a 125 C MIL b 65 C to a 150 C Storage Temperature Range
ecommended Operating Conditions
Symbol VCC VIH VIL IOH IOL TA ts (H) ts (L) th (H) th (L) ts (H) th (L) tw (L) tw (L) trec Parameter Min Supply Voltage High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Current Free Air Operating Temperature Setup Time HIGH or LOW Dn to E Hold Time HIGH or LOW Dn to E Setup Time HIGH Dn to Sn Hold Time LOW Dn to Sn E Pulse Width LOW MR Pulse Width LOW Recovery Time MR to E
b 55
93L14 (MIL) Nom 5 Max 55
Units V V 07
b 400
45 2
V mA mA
48 125
C
ns ns ns ns ns ns ns
10 20 0 10 15 5 30 25 5
2
Electrical Characteristics
Over recommended operating free air temperature range (unless otherwise noted) Symbol VI VOH VOL II IIH Parameter Input Clamp Voltage High Level Output Voltage Low Level Output Voltage Input Current Input Voltage
Max
Conditions VCC e Min II e b10 mA VCC e Min IOH e Max VIL e Max VIH e Min VCC e Min IOL e Max VIH e Min VIL e Max VCC e Max VI e 5 5V VCC e Max VI e 2 4V Inputs Dn
Min
Typ (Note 1)
Max
b1 5
Units V V
24 0
3
V mA mA
1 20 30
b 400 b 600 b2 5 b 25
High Level Input Current
IIL
Low Level Input Current
VCC e Max VI e 0 3V
Inputs Dn
mA
IOS ICC
Short Circuit Output Current Supply Current
VCC e Max (Note 2) VCC e Max (Note 3)
mA mA
16 5
Note 1 All typicals are at VCC e 5V TA e 25 C Note 2 Not more than one output should be shorted at a time and the duration should not exceed one second o S te 3 ICC is measured with all outputs open and all inputs grounded
witching Characteristics
VCC e a 5 0V TA e a 25 C (See Section 1 for waveforms and load configurations) Symbol tPLH tPHL tPLH tPHL tPLH tPHL Parameter Min Propagation Delay E to Qn Propagation Delay Dn to Qn Propagation Delay MR to Qn Propagation Delay Sn to Qn CL e 15 pF Max 45 36 30 30 30 33 ns ns ns ns Units
3
Functional Description
The 93L14 consists of four latches with a common active W LOW Enable input and active LOW Master Reset input hen the Enable goes HIGH data present in the latches is stored and the state of the latch is no longer affected by the Sn and Dn inputs The Master Reset when activated overE rides all other input conditions forcing all latch outputs LOW ach of the four latches can be operated in one of two D modes -TYPE-LATCH For D-type operation the S input of a latch is held LOW While the common Enable is active the latch output follows the D input Information present at the latch output is stored in the latch when the Enable goes S HIGH ET RESET LATCH During set reset operation when the common Enable is LOW a latch is reset by a LOW on the D input and can be set by a LOW on the S input if the D input is HIGH If both S and D inputs are LOW the D input will dominate and the latch wil be reset When the Enable goes HIGH the latch remains in the last state prior to disablement The two modes of latch operation are shown in the Truth Table
ruth Table
MR H H H H H H H H L E L L H L L L L H X D L H X L H L H X X S L L X L L H H X X Qn L L Qnb1 L H L Qnb1 Qnb1 L RESET R S Mode Operation D Mode
H e HIGH Voltage Level L e LOW Voltage Level X e Immaterial Qnb1 e Previous Output State Qn e Present Output State
T
Logic Diagram
TL F 9612 3
4
Physical Dimensions inches (millimeters)
16-Lead Ceramic Dual-In-Line Package (J) Order Number 93L14DMQB NS Package Number J16A
5
Others parts begin by 93
93-1 93-2
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