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Details, datasheet, quote on part number:9602DM
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| Part: | 9602DM |
| Category: | Logic => Multivibrators/Oscillators => Bipolar->TTL Family |
| Description: | Dual Retriggerable, Resettable Monostable Multivibrator (one Shot) With Complementary Outputs (life-time Buy) |
| Company: | National Semiconductor Corporation |
| Datasheet: | Download 9602DM datasheet File size : 184 kB |
| Request For quote: | Find where to buy 9602DM
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Datasheet text preview:
9602 DM9602 Dual Retriggerable Resettable One Shots
June 1989
R 9602 DM9602 Dual Retriggerable esettable One Shots
General Description
These dual resettable retriggerable one shots have two inputs per function one which is active high and one which is active low This allows the designer to employ either leading-edge or trailing-edge triggering which is independent of input transition times When input conditions for triggering are met a new cycle starts and the external capacitor is allowed to rapidly discharge and then charge again The retriggerable feature permits output pulse widths to be extended In fact a continuous true output can be maintained by having an input cycle time which is shorter than the outCt cycle time The output pulse may then be terminated at pu R any time by applying a low logic level to the RESET pin etriggering may be inhibited by either connecting the Q output to an active high input or the Q output to an active low input
Y Y Y Y Y Y
eatures
70 ns to % output width range Resettable and retriggerable 0% to 100% duty cycle TTL input gating leading or trailing edge triggering Complementary TTL outputs Optional retrigger lock-out capability Pulse width compensated for VCC and temperature variations C Alternate Military Aerospace device (54xxx) is available ontact a National Semiconductor Sales Office Distributor for specifications
Y
F
onnection Diagram
Dual-In-Line Package
TL F 6611 1
Order Number 9602DMQB 9602FMQB or DM9602N See NS Package Number J16A N16E or W16A
Function Table
Pin No's A HxL H X B L LxH X CLR H H L Trigger Trigger Reset O peration
H e High Voltage Level L e Low Voltage Level X e Don't Care
C1995 National Semiconductor Corporation TL F 6611 RRD-B30M105 Printed in U S A
Absolute Maximum Ratings (Note)
p If Military Aerospace specified devices are required lease contact the National Semiconductor Sales S Office Distributors for availability and specifications upply Voltage Input Voltage 7V 5 5V Note The ``Absolute Maximum Ratings'' are those values beyond which the safety of the device cannot be guaranteed The device should not be operated at these limits The parametric values defined in the ``Electrical Characteristics'' table are not guaranteed at the absolute maximum ratings T he ``Recommended Operating Conditions'' table will define the conditions for actual device operation
Operating Free Air Temperature Range R b 55 C to a 125 C Military Commercial 0 C to a 70 C Storage Temperature Range
b 65
C to a 150 C
ecommended Operating Conditions
Symbol VCC VIH Parameter Min Supply Voltage High Level Input Voltage TA e b55 C TA e 0 C TA e 25 C TA e 75 C TA e 125 C VIL Low Level Input Voltage TA e b55 C TA e 0 C TA e 25 C TA e 75 C TA e 125 C IOH IOL TA High Level Output Current Low Level Output Current Free Air Operating Temperature
b 55
Military Nom 5 Max 55 Min 4 75 19 17 15 0 85 18 1 65 45 2
Commercial Nom 5 Max 5 25
Units V
V
0 85 09 0 85
b0 8 b0 8
0 85 0 85
V
mA mA
16 125 0
16 75
C
Electrical Characteristics
Symbol VI VOH Parameter Input Clamp Voltage High Level Output Voltage Low Level Output Voltage High Level Input Current Low Level Input Current
over recommended operating free air temperature range (unless otherwise noted) Conditions (Note 3) Min Typ (Note 1) Max
b1 5
Units V V
VCC e Min II e b12 mA VCC e Min VIL e Max (Note 4) IOH e Max VIH e Min MIL COM 24
VOL
VCC e Min IOL e Max VIL e Max VIH e Min (Note 4) VCC e Max VI e 4 5V VCC e Max VCC e Min
04 0 45 60 V mA
IIH IIL
MIL VI e 0 40V COM VI e 0 45V MIL VI e 0 40V COM VI e 0 45V MIL COM MIL COM 39 39
b1 6 b1 6 b 1 24 b 1 41 b 25 b 35
mA
IOS ICC
Short Circuit Output Current Supply Current
VCC e Max VOUT e 1V (Notes 2 and 4) VCC e Max
mA mA
45 50
Note 1 All typicals are at VCC e 5V TA e 25 C Note 2 Not more than one output should be shorted at a time Note 3 Unless otherwise noted RX e 10k for all tests ote 4 Ground PIN 1(15) for VOL on PIN 7(9) or VOH and IOS on PIN 6(10) and apply momentary ground to PIN 4(12) Open PIN 1(15) for VOL on PIN 6(10) or VOH and IOS on PIN 7(9) 2
Switching Characteristics VCC e 5V
Symbol tPLH tPHL tPW(MIN) Parameter Propagation Delay Time Low-to-High Level Output Propagation Delay Time High-to-Low Level Output Minimum True Output Pulse Width Minimum Complement Pulse Width tPW CSTRAY RX Pulse Width Maximum Allowable Wiring Capacitance External Timing Resistor
TA e 25 C (See Section 1 for Test Waveforms and Output Load) Conditions Military Min Max 35 43 90 100 RX e 10 kX CX e 1000 pF Pins 2 14 to GND 5 3 08 3 76 50 25 5 3 08 Commercial Min Max 40 48 100 ns 110 3 76 50 50 ms pF kX ns ns Units
Negative Trigger Input to True Output Negative Trigger Input To Complement Output CL e 15 pF CX e 0 RX e 5 kX
Logic Diagrams
TL F 6611 2
TL F 6611 3
Operating Rules
1 An external resistor (RX) and external capacitor (CX) are 2 required as shown in the Logic Diagram The value of CX may vary from 0 to any necessary value available If however the capacitor has leakages approaching 3 0 mA or if stray capacitance from either terminal to ground is more than 50 pF the timing equations 3 may not represent the pulse width obtained tThe output pulse with (t) is defined as follows
e K RXCX
If electrolytic type capacitors are to be used the following A three configurations are recommended Use with low leakage capacitors T he normal RC configuration can be used predictably only if the forward capacitor leakage at 5 0V is less than 3 mA and the inverse capacitor leakage at 1 0V is less than 5 mA over the operational temperature range R
where
1 for CX l 103 pF 0 34 K RX RX is in kX CX is in pF t is in ns for CX k 103 pF see Figure 1
a
1
(
k 0 6 RX (Max)
TL F 6611 4
or K vs CX see Figure 6
4
3
Operating Rules (Continued)
B Use with high inverse leakage current electrolytic caT pacitors he diode in this configuration prevents high inverse leakage currents through the capacitor by preventing an inverse voltage across the capacitor The use of this configuration is not recommended with retriggerable operation t 0 3 RCX Input Trigger Pulse Rules (See Triggering Truth Table)
TL F 6611 8
Input to Pin 5(11) Pin 4(12) e LOW
(Pin 3(13) e HIGH)
t1 t3 e Min Positive Input Pulse Width l 40 ns t2 t4 e Min Negative Input Pulse Width l 40 ns
TL F 6611 5
C Use to obtain extended pulse widths T his configuration can be used to obtain extended pulse widths because of the larger timing resistor allowed by beta multiplication Electrolytics with high inR verse leakage currents can be used
k RX (0 7) (hFE Q1) or k 2 5 MX whichever is the
TL F 6611 9
lesser RX (min) k RY k RX (max) (5 kX s RY s 10 kX is recommended) Q1 NPN silicon transistor with hFE requirements of above equations such as 2N5961 or 2N5962 t 0 3 RCX
Input to Pin 4(12) Pin 5(11) e HIGH
(Pin 3(13) e HIGH)
8 The retriggerable pulse width is calculated as shown betlow
W e t a tPLH e K RX CX
1
a
1 RX
J
a tPLH
TL F 6611 10 The retrigger pulse width is equal to the pulse width (t) plus a delay time For pulse widths greater than 500 ns tW can be approximated as t Retriggering will not occur if the retrigger pulse comes within 9 pulse (i e during the discharge cycle) TL F 6611 6 0 3 CX (ns) after the initial trigger
5
This configuration is not recommended with retriggerable operation To obtain variable pulse width by remote trimming the following circuit is recommended T
Reset Operation An overriding clear (active LOW level) is provided on each one shot By applying a LOW to the reset any timing cycle can be terminated or any new cycle inhibited until the LOW reset input is removed Trigger inputs will not produce spikes in the output when the reset is held LOW T
L F 6611 7
6 Under any operating condition CX and RX (min) must be kept as close to the circuit as possible to minimize stray capacitance and reduce noise pickup
L F 6611 11
10 VCC and Ground wiring should conform to good high 7 frequency standards so that switching transients on VCC and Ground leads do not cause interaction between one shots Use of a 0 01 to 0 1 mF bypass capacitor between VCC and Ground located near the DM9602 is recF ommended
or further detailed device characteristics and output performance please refer to the NSC one-shot application note AN-366
4
Typical Performance Characteristics
TL F 6611 12
TL F 6611 13
FIGURE 1 Output Pulse Width vs Timing Resistance and Capacitance for CX k 103 pF
FIGURE 2 Normalized Output Pulse Width vs Ambient Temperature
TL F 6611 14
TL F 6611 15
FIGURE 3 Pulse Width vs Timing Resistor
FIGURE 4 Normalized Output Pulse Width vs Supply Voltage
TL F 6611 16
FIGURE 5 Minimum Output Pulse Width vs Ambient Temperature
TL F 6611 17
FIGURE 6 Typical ``K'' Coefficient Variation vs Timing Capacitance
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