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Details, datasheet, quote on part number:ADC08200CIMT
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| Part: | ADC08200CIMT |
| Category: | Data Conversion => ADC (Analog to Digital Converters) |
| Description: | ADC08200 - 8-Bit, 20 MSPS to 200 Msps, 1.05 Mw/msps A/D Converter, Package: Tssop, Pin Nb=24 |
| Company: | National Semiconductor Corporation |
| Datasheet: | Download ADC08200CIMT datasheet File size : 551 kB |
| Request For quote: | Find where to buy ADC08200CIMT
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Datasheet text preview:
ADC08200 8-Bit, 20 MSPS to 200 MSPS, 1.05 mW/MSPS A/D Converter
November 2002
ADC08200 8-Bit, 20 MSPS to 200 MSPS, 1.05 mW/MSPS A/D Converter
General Description
The ADC08200 is a low-power, 8-bit, monolithic analog-todigital converter with an on-chip track-and-hold circuit. Optimized for low cost, low power, small size and ease of use, this product operates at conversion rates up to 230 MSPS while consuming just 1.05 mW per MHz of clock frequency, or 210 mW at 200 MSPS. Raising the PD pin puts the ADC08200 into a Power Down mode where it consumes 1 mW. The unique architecture achieves 7.3 Effective Bits with 50 MHz input frequency. The ADC08200 is resistant to latch-up and the outputs are short-circuit proof. The top and bottom of the ADC08200's reference ladder are available for connections, enabling a wide range of input possibilities. The digital outputs are TTL/CMOS compatible with a separate output power supply pin to support interfacing with 3V or 2.5V logic. The digital inputs (CLK and PD) are TTL/CMOS compatible. The ADC08200 is offered in a 24-lead plastic package (TSSOP) and is specified over the industrial temperature range of -40°C to +85°C.
Key Specifications
j Resolution: j Maximum sampling frequency: j DNL: j ENOB (fIN = 50 MHz): j THD (fIN = 50 MHz): j No missing codes j Power Consumption
8 bits 200 MSPS (min)
± 0.4 LSB (typ)
7.3 bits (typ) -61 dB (typ) Guaranteed 1.05 mW/MSPS (typ) 1 mW (typ)
Operating Power down
Applications
n n n n n n n n n Flat panel displays Projection systems Set-top boxes Battery-powered instruments Communications Medical scan converters X-ray imaging High speed viterbi decoders Astronomy
Features
n n n n n Single-ended input Internal sample-and-hold function Low voltage (single +3V) operation Small package Power-down feature
Pin Configuration
20017901
© 2002 National Semiconductor Corporation
DS200179
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ADC08200
Ordering Information
ADC08200CIMT ADC08200CIMTX TSSOP TSSOP (tape and reel)
Block Diagram
20017902
Pin Descriptions and Equivalent Circuits
Pin No. Symbol Equivalent Circuit Description
6
VIN
Analog signal input. Conversion range is VRB to VRT.
3
VRT
Analog Input that is the high (top) side of the reference ladder of the ADC. Nominal range is 0.5V to VA. Voltage on VRT and VRB inputs define the VIN conversion range. Bypass well. See Section 2.0 for more information. Mid-point of the reference ladder. This pin should be bypassed to a quiet point in the analog ground plane with a 0.1 µF capacitor. Analog Input that is the low side (bottom) of the reference ladder of the ADC. Nominal range is 0.0V to (VRT 0.5V). Voltage on VRT and VRB inputs define the VIN conversion range. Bypass well. See Section 2.0 for more information.
9
VRM
10
VRB
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2
ADC08200
Pin Descriptions and Equivalent Circuits
Pin No. Symbol Equivalent Circuit
(Continued) Description Power Down input. When this pin is high, the converter is in the Power Down mode and the data output pins hold the last conversion result.
23
PD
24
CLK
CMOS/TTL compatible digital clock Input. VIN is sampled on the rising edge of CLK input.
13 thru 16 and 19 thru 22
D0 D7
Conversion data digital Output pins. D0 is the LSB, D7 is the MSB. Valid data is output just after the rising edge of the CLK input.
7
VIN GND
Reference ground for the single-ended analog input, VIN. Positive analog supply pin. Connect to a quiet voltage source of +3V. VA should be bypassed with a 0.1 µF ceramic chip capacitor for each pin, plus one 10 µF capacitor. See Section 3.0 for more information. Power supply for the output drivers. If connected to VA, decouple well from VA. The ground return for the output driver supply. The ground return for the analog supply.
1, 4, 12
VA
18 17 2, 5, 8, 11
VDR DR GND AGND
3
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ADC08200
Absolute Maximum Ratings
2)
(Notes 1,
Soldering Temperature, Infrared, 10 seconds (Note 6) Storage Temperature
235°C -65°C to +150°C
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VA) Driver Supply Voltage (VDR) Voltage on Any Input or Output Pin Reference Voltage (VRT, VRB) CLK, PD Voltage Range Input Current at Any Pin (Note 3) Package Input Current (Note 3) Power Dissipation at TA = 25°C ESD Susceptibility (Note 5) Human Body Model Machine Model 3.8V VA +0.3V -0.3V to VA VA to AGND -0.05V to (VA + 0.05V)
Operating Ratings (Notes 1, 2)
Operating Temperature Range Supply Voltage (VA) Driver Supply Voltage (VDR) Ground Difference |GND - DR GND| Upper Reference Voltage (VRT) Lower Reference Voltage (VRB) VIN Voltage Range -40°C TA +85°C +2.7V to +3.6V +2.4V to VA 0V to 300 mV 0.5V to (VA -0.3V) 0V to (VRT -0.5V) VRB to VRT
± 25 mA ± 50 mA
See (Note 4) 2500V 200V
Converter Electrical Characteristics
The following specifications apply for VA = VDR = +3.0VDC, VRT = +1.9V, VRB = 0.3V, CL = 5 pF, fCLK = 200 MHz at 50% duty cycle. Boldface limits apply for TA = TMIN to TMAX: all other limits TA = 25°C (Notes 7, 8) Symbol DC ACCURACY INL DNL FSE VOFF Integral Non-Linearity Differential Non-Linearity Missing Codes Full Scale Error Zero Scale Offset Error 36 46 +1.0 -0.3 +1.9 -1.2 LSB (max) LSB (min) LSB (max) (max) mV (max) mV (max) V (min) V (max) pF pF M MHz VA 0.5 VRT - 0.5 0 120 200 2.0 0.8 10 -50 3 VA = VDR = 2.7V, IOH = -400 µA VA = VDR = 2.7V, IOL = 1.0 mA
4
Parameter
Conditions
Typical (Note 9)
Limits (Note 9)
Units (Limits)
± 0.4
± 0.95
0 50 60 VRB VRT
ANALOG INPUT AND REFERENCE CHARACTERISTICS VIN CIN RIN BW VRT VRB RREF Input Voltage VIN Input Capacitance RIN Input Resistance Full Power Bandwidth Top Reference Voltage Bottom Reference Voltage Reference Ladder Resistance VRT to VRB VIN = 0.75V +0.5 Vrms (CLK LOW) (CLK HIGH) 1.6 3 4
>1
500 1.9 0.3 160
V (max) V (min) V (max) V (min) (min) (max) V (min) V (max) nA nA pF
CLK, PD DIGITAL INPUT CHARACTERISTICS VIH VIL IIH IIL CIN VOH VOL Logical High Input Voltage Logical Low Input Voltage Logical High Input Current Logical Low Input Current Logic Input Capacitance High Level Output Voltage Low Level Output Voltage VDR = VA = 3.6V VDR = VA = 2.7V VIH = VDR = VA = 3.6V VIL = 0V, VDR = VA = 2.7V
DIGITAL OUTPUT CHARACTERISTICS 2.6 0.4 2.4 0.5 V (min) V (max)
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ADC08200
Converter Electrical Characteristics
(Continued)
The following specifications apply for VA = VDR = +3.0VDC, VRT = +1.9V, VRB = 0.3V, CL = 5 pF, fCLK = 200 MHz at 50% duty cycle. Boldface limits apply for TA = TMIN to TMAX: all other limits TA = 25°C (Notes 7, 8) Symbol Parameter Conditions Typical (Note 9) 7.5 7.4 7.3 7.2 7.0 47 46 46 45 44 47 46 46 45 44 60 58 60 57 54 -60 -58 -60 -56 -53 -66 -68 -66 -60 -55 -72 -58 -72 -58 -60 -55 43.4 43.3 6.9 Limits (Note 9) Units (Limits) Bits Bits Bits (min) Bits Bits dB dB dB (min) dB dB dB dB dB (min) dB dB dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc
DYNAMIC PERFORMANCE fIN = 4 MHz, VIN = FS - 0.25 dB fIN = 20 MHz, VIN = FS - 0.25 dB ENOB Effective Number of Bits fIN = 50 MHz, VIN = FS - 0.25 dB fIN = 70 MHz, VIN = FS - 0.25 dB fIN = 100 MHz, VIN = FS - 0.25 dB fIN = 4 MHz, VIN = FS - 0.25 dB fIN = 20 MHz, VIN = FS - 0.25 dB SINAD Signal-to-Noise & Distortion fIN = 50 MHz, VIN = FS - 0.25 dB fIN = 70 MHz, VIN = FS - 0.25 dB fIN = 100 MHz, VIN = FS - 0.25 dB fIN = 4 MHz, VIN = FS - 0.25 dB fIN = 20 MHz, VIN = FS - 0.25 dB SNR Signal-to-Noise Ratio fIN = 50 MHz, VIN = FS - 0.25 dB fIN = 70 MHz, VIN = FS - 0.25 dB fIN = 100 MHz, VIN = FS - 0.25 dB fIN = 4 MHz, VIN = FS - 0.25 dB fIN = 20 MHz, VIN = FS - 0.25 dB SFDR Spurious Free Dynamic Range fIN = 50 MHz, VIN = FS - 0.25 dB fIN = 70 MHz, VIN = FS - 0.25 dB fIN = 100 MHz, VIN = FS - 0.25 dB fIN = 4 MHz, VIN = FS - 0.25 dB fIN = 20 MHz, VIN = FS - 0.25 dB THD Total Harmonic Distortion fIN = 50 MHz, VIN = FS - 0.25 dB fIN = 70 MHz, VIN = FS - 0.25 dB fIN = 100 MHz, VIN = FS - 0.25 dB fIN = 4 MHz, VIN = FS - 0.25 dB fIN = 20 MHz, VIN = FS - 0.25 dB HD2 2nd Harmonic Distortion fIN = 50 MHz, VIN = FS - 0.25 dB fIN = 70 MHz, VIN = FS - 0.25 dB fIN = 100 MHz, VIN = FS - 0.25 dB fIN = 4 MHz, VIN = FS - 0.25 dB fIN = 20 MHz, VIN = FS - 0.25 dB HD3 3rd Harmonic Distortion fIN = 50 MHz, VIN = FS - 0.25 dB fIN = 70 MHz, VIN = FS - 0.25 dB fIN = 100 MHz, VIN = FS - 0.25 dB IMD Intermodulation Distortion f1 = 11 MHz, VIN = FS - 6.25 dB f2 = 12 MHz, VIN = FS - 6.25 dB DC Input fIN = 10 MHz, VIN = FS - 3 dB DC Input, PD = Low DC Input, PD = Low CLK Low, PD = Hi DC Input, Excluding Reference FSE change with 2.7V to 3.3V change in VA
5
POWER SUPPLY CHARACTERISTICS IA IDR IA + IDR PC PSRR1 Analog Supply Current Output Driver Supply Current Total Operating Current Power Consumption Power Supply Rejection Ratio 69.75 69.75 0.25 70 0.3 210 54 260 0.6 86.6 86 mA (max) mA (max) mA (max) mA (max) mA mW (max) dB
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