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Details, datasheet, quote on part number:ADC0858BI
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| Part: | ADC0858BI |
| Category: | Data Conversion => ADC (Analog to Digital Converters) => <10 bit |
| Description: | 8-bit Analog Data Acquisition And Monitoring System (discontinued) |
| Company: | National Semiconductor Corporation |
| Datasheet: | Download ADC0858BI datasheet File size : 595 kB |
| Request For quote: | Find where to buy ADC0858BI
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Datasheet text preview:
ADC0851 and ADC0858 8-Bit Analog Data Acquisition and Monitoring Systems
January 1995
ADC0851 and ADC0858 8-Bit Analog Data Acquisition and Monitoring Systems
General Description
The ADC0851 and ADC0858 are 2 and 8 input analog data acquisition systems They can function as conventional multiple input A D converters automatic scanning A D converters or programmable analog ``watchdog'' systems In ``watchdog'' mode they monitor analog inputs and determine whether these inputs are inside or outside user programmed window limits This monitoring process takes place independent of the host processor When any input falls outside of its programmed window limits an interrupt is automatically generated which flags the processor the chip can then be interrogated as to exactly which channels T crossed which limits he advantage of this approach is that its frees the processor from having to frequently monitor analog variables It can consequently save having to insert many A D subroutine calls throughout real time application code In control systems where many variables are continually being monitored this can significantly free up the processor especially T if the variables are DC or slow varying signals he Auto A D conversion feature allows the device to scan through selected input channels performing an A D conversion on each channel without the need to select a new A channel after each conversion
Key Specifications
Y Y Y Y Y
Resolution Total error Low power Conversion time Limit comparison time
g
8 Bits LSB or g 1 LSB 50 mW 18 ms Channel 2 ms Limit
Features
Y Y
Y Y Y Y
Y Y Y Y Y
Watchdog operation signals processor when any channel is outside user programmed window limits Frees microprocessor from continually monitoring analog signals and simplifies applications software 2 (ADC0851) or 8 (ADC0858) analog input channels Single ended or differential input pairs COM input for DC offsetting of input voltage 4 (ADC0851) and 16 (ADC0858) 8-bit programmable limits NSC MICROWIRETM interface Power fail detection Auto A D conversion feature Single 5V supply Window limits are user programmable via serial interface
pplications
Y Y Y
Instrumentation monitoring and process control Digitizing automotive sensor signals Embedded diagnostics
Simplified Block Diagram
TL H 11021 22
FIGURE 1
C M I-STATE is a registered trademark of National Semiconductor Corporation TR ICROWIRETM is a trademark of National Semiconductor Corporation
1995 National Semiconductor Corporation
TL H 11021
RRD-B30M75 Printed in U S A
Connection Diagrams
ADC0851 2-Channel MUX Dual-In-Line Package ADC0858 8-Channel MUX Dual-In-Line Package
TL H 11021 1
Top View
TL H 11021 2
Top View
ADC0851 PLCC Package
ADC0858 PLCC Package
TL H 11021 4 TL H 11021 3
Top View
Top View
Ordering Information
Industrial (b40 C s TA s a 85 C) ADC0851BIN ADC0851CIN ADC0858BIN ADC0858CIN ADC0851BIV ADC0851CIV ADC0858BIV ADC0858CIV Package N16E 16-Pin Plastic DIP N20A 20-Pin Plastic DIP V20A 20-Lead PLCC V20A 20-Lead PLCC Military (b55 C s TA s a 125 C) ADC0851CMJ 883 ADC0858CMJ 883 Package J16A 16-Pin Ceramic DIP J20A 20-Pin Ceramic DIP
2
Absolute Maximum Ratings (Notes 1
2)
Operating Ratings (Notes 1
Supply Voltage VCC Temperature Range ADC0858CMJ 883 ADC0851CMJ 883 ADC0858BIN ADC0858CIN ADC0851BIN ADC0851CIN ADC0858BIV ADC0858CIV ADC0851BIV ADC0851CIV
b 55 b 55
2) 4 5V to 5 5V TMIN s TA s TMAX
p If Military Aerospace specified devices are required lease contact the National Semiconductor Sales S Office Distributors for availability and specifications upply Voltage VCC Voltage at Logic and Analog Inputs (Note 3) Input Current per Pin Input Current per Package Storage Temperature Package Dissipation at TA e a 25 C (Board Mount) Lead Temperature (Soldering 10 Sec ) Dual-In-Line (Plastic) Dual-In-Line (Ceramic) ESD Susceptibility (Note 4)
b 65
6 5V
b 0 3V to VCC a 0 3V
g 5 mA g 20 mA
C to a 150 C
500 mW 800 mW
a 260 a 300
C s TA s a 125 C C s TA s a 125 C b 40 C s TA s a 85 C b 40 C s TA s a 85 C b 40 C s TA s a 85 C b 40 C s TA s a 85 C
C C
2000V
DC Electrical Characteristics
The following specifications apply for VCC e a 5 VDC VREF e a 4 5 VDC AGND e DGND e 0V and fOSC e 1 MHz (Rext e 3 16 kX Cext e 170 pF) unless otherwise specified Boldface limits apply for TA e TJ e TMIN to TMAX all other limits apply at TA e TJ ePa 25 C arameter Conditions Typical (Note 5) Limit (Note 6) Units (Limits)
CONVERTER AND MULTIPLEXER CHARACTERISTICS Total Unadjusted Error (Note 7) ADC0851 8 BIN ADC0851 8 BIV ADC0851 8 CIN ADC0851 8 CMJ ADC0851 8 CIV Comparator Offset ADC0851 8 BIN ADC0858BIV ADC0851 8 CIN ADC0851 8 CMJ ADC0858CIV VREF Input Resistance Common Mode Input Voltage (Note 8) DC Common Mode Error Power Supply Sensitivity All MUX Inputs and COM Input DVCM e b0 05V to a 5 05V VREF e 4 75V VCC e 5V g 5% VREF e 4 5V VCC e 5V g 10% On Channel e 5V Off Channel e 0V On Channel e 0V Off Channel e 5V On Channel e 5V Off Channel e 0V On Channel e 0V Off Channel e 5V
g 1 16 g2 5 g2 5 g2 5
g g1 g1
LSB (Max) LSB (Max) LSB (Max) mV (Max) mV (Max) mV (Max) kX (Min) kX (Max) V (Min) V (Max) LSB (Max) LSB (Max)
g 10 g 20 g 20
6
35 10 GND b 0 05 VCC a 0 05
g1 4
g 1 16 g 1 16
g1 4 g1 2
IOFF Off Channel Leakage Current (Note 9) ION On Channel Leakage Current (Note 9)
b 0 01 a 0 01 a 0 01 b 0 01
b3 a3 a3 b3
mA (Max) mA (Max) mA (Max) mA (Max)
3
DC Electrical Characteristics (Continued) The following specifications apply for VCC e a 5 VDC VREF e a 4 5 VDC AGND e DGND e 0V and fOSC e 1 MHz (Rext e 3 16 kX Cext e 170 pF) unless otherwise specified Boldface limits apply for TA e TJ e TMIN to TMAX all other limits apply at TA e P J e a 25 C T
arameter DIGITAL CHARACTERISTICS Logic ``1'' Input Voltage VIH Logic ``0'' Input Voltage VIL Logic ``1'' Input Current IIH Logic ``0'' Input Current IIL Logic ``1'' Output Voltage VOH (Except INT) Logic ``0'' Output Voltage VOL TRI-STATE Output Current (DO) ISOURCE (Except INT) ISINK Supply Current ICC ADC0851 or ADC0858 VCC e 5 5V VCC e 4 5V VIN e VCC VIN e 0V VCC e 4 5V IOUT e b360 mA IOUT e b10 mA IOUT e 1 6 mA VCC e 4 5V CS e Logic ``1'' (5V) VOUT e 0 4V VOUT e 5V VOUT Short to GND VOUT Short to VCC fCLK e 1 MHz fCLK e 2 MHz (Note 10)
b0 1
Conditions
Typical (Note 5)
Limit (Note 6)
Units (Limits)
22 08 0 005
b 0 005
V (Min) V(Max) mA (Max) mA (Max)
3
b3
24 42 04
V (Min) V (Min) V (Max)
b3
01
b 14
3
b6 5
mA (Max) mA (Max) mA (Min) mA (Min) mA (Max) mA
16 7 72
8 10
AC Electrical Characteristics
The following specifications apply for VCC e a 5 VDC VREF e a 4 5 VDC AGND e DGND e 0V fCLK e 1 MHz tr e tf e 5 nS unless otherwise specified Boldface limits apply for TA e TJ e TMIN to TMAX all other limits apply at TA e TJ e 25 C s ymbol fCLK Parameter Data Clock Frequency Clock Duty Cycle (Note 11) tSET-UP CS Falling Edge or Data Input Valid to CLK Rising Edge Data Input Valid after CLK Rising Edge CLK Rising Edge to Output Data Valid CL e 100 pF 30 Conditions Typical (Note 5) 1 Limit (Note 6) 2 40 60 70 Units (Limits) MHz (Max) % (Min) % (Max) ns (Min)
tHOLD tPD1 tPD0
5 80
30 200
ns (Min) ns (Max)
4
AC Electrical Characteristics (Continued) The following specifications apply for VCC e a 5 VDC VREF e a 4 5 VDC AGND e DGND e 0V fCLK e 1 MHz tr e tf e 5 S s unless otherwise specified Boldface limits apply for TA e TJ e TMIN to TMAX all other limits apply at TA e TJ e 25 C n
ymbol t1H t0H Parameter Rising Edge of CS to Data Output Hi-Z Oscillator Clock Freq (Analog Timing) CS to End of Conversion Delay 1 2 tConv Conversion Time 17 18 tCS-INT CIN COUT CS to Interrupt Delay Capacitance of Logic Input Capacitance of Logic Output 60 5 5 120 Conditions C e 100 pF R e 2k (See TRI-STATE Test Circuits) Rext e 3 16 kX Cext e 170 pF Typical (Note 5) 90 Limit (Note 6) 200 14 06 Units (Limits) ns (Max) MHz (Max) MHz (Min) OSC Clock Periods Min Max OSC Clock Periods (Min) (Max) ns (Max) pF pF
fOSC tEOC
1
Note 1 Absolute Maximum Ratings indicate limits beyond which damage to the device may occur Operating Ratings indicate conditions for which the device is functional but do not guarantee specific performance limits For guaranteed specifications and test conditions see the Electrical Characteristics The guaranteed specifications apply only for the test conditions listed Some performance characteristics may degrade when the device is not operated under the listed test N conditions Note 2 All voltages are measured with respect to ground (AGND e DGND e 0V) ote 3 All of the analog and digital input pins are internally diode clamped to the supply pins Should the applied voltage at any pin exceed the power supply N voltage the additional absolute value of current at that pin (caused by the forward biasing of the internal diodes) should be limited to 5 mA or less Note 4 Human body model 100 pF discharged through a 1 5 kX resistor Note 5 Typical specifications are at a 25 C and represent the most likely parametric norm Note 6 Tested limits are guaranteed to National's AOQL (Average Outgoing Quality Level) Note 7 Total unadjusted error includes comparator offset ADC linearity and multiplexer error and is expressed in LSBs ote 8 Two on-chip diodes are tied to each analog input The diodes will forward conduct for analog input voltages one diode drop below ground or one diode drop above VCC Care should be exercised when operating the device at low supply voltages (e g VCC e 4 5V) because high analog inputs (5V) can cause the input diodes to conduct especially at elevated temperatures This will cause errors for analog inputs near full scale The specification allows 50 mV forward bias of either clamp diode Thus as long as VIN or VREF does not exceed the supply voltage by more than 50 mV the output code will be correct To achieve an absolute 0 VDC to 5 VDC input voltage range will therefore require a minimum supply voltage of 4 950 VDC N Note 9 Leakage current is measured with the oscillator clock disabled Note 10 Measured supply current does not include the DAC ladder current ote 11 A 40% to 60% clock duty cycle range ensures proper operation at all5 lock frequencies c
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