Digchip : Database on electronics components
Electronic components database
Search:                      In section:
Member, Distributor  
Log In
Email:
Password:

Details, datasheet, quote on part number:ADC10664
 
 
Part:ADC10664
Category:Data Conversion => ADC (Analog to Digital Converters)
Description:ADC10664 - 10-Bit 360 NS A/D Converter With Input Multiplexer And Sample/Hold, Package: Soic Wide, Pin Nb=28
Company:National Semiconductor Corporation
Datasheet:Download ADC10664 datasheet   File size : 292 kB
Request For quote:  Find where to buy ADC10664
 



Datasheet text preview:
ADC10662/ADC10664 10-Bit 360 ns A/D Converter with Input Multiplexer and Sample/Hold

November 2001

ADC10662/ADC10664 10-Bit 360 ns A/D Converter with Input Multiplexer and Sample/Hold
General Description
Using an innovative, patented multistep* conversion technique, the 10-bit ADC10662 and ADC10664 are 2- and 4-input CMOS analog-to-digital converters offering sub-microsecond conversion times yet dissipating a maximum of only 235 mW. The ADC10662 and ADC10664 perform a 10-bit conversion in two lower-resolution "flashes", thus yielding a fast A/D without the cost, power dissipation, and other problems associated with true flash approaches. In addition to standard static performance specifications (Linearity, Full-Scale Error, etc.) dynamic performance (THD, S/N) is guaranteed. The analog input voltage to the ADC10662 and ADC10664 is sampled and held by an internal sampling circuit. Input signals at frequencies from dc to over 250 kHz can therefore be digitized accurately without the need for an external sample-and-hold circuit. The ADC10662 and ADC10664 include a "speed-up" pin. Connecting an external resistor between this pin and ground reduces the typical conversion time to as little as 360 ns. For ease of interface to microprocessors, the ADC10662 and ADC10664 have been designed to appear as a memory location or I/O port without the need for external interface logic.

Features
n n n n Built-in sample-and-hold Single +5V supply 2- or 4-input multiplexer options No external clock required

Key Specifications
n Conversion time to 10 bits: 360 ns typical, 466 ns max over temperature n Sampling Rate: 1.5 MHz (min) n Low power dissipation: 235 mW (max) n Total harmonic distortion (50 kHz): -60 dB (max) n No missing codes over temperature

Applications
n n n n Digital signal processor front ends Instrumentation Disk drives Mobile telecommunications

Ordering Information
ADC10662 Industrial (-40°C TA +85°C) ADC10662CIWM Package M24B Small Outline ADC10664 Industrial (-40°C TA +85°C) ADC10664CIWM Package M28B Small Outline

*U.S. Patent Number 4918449 TRI-STATE ® is a registered trademark of National Semiconductor Corporation.

© 2001 National Semiconductor Corporation

DS011192

www.national.com

ADC10662/ADC10664

Simplified Block Diagram

01119209

*ADC10664 Only

Connection Diagrams

01119210

Top View
01119211

Top View

www.national.com

2

ADC10662/ADC10664

Pin Descriptions
DVCC, AVCC These are the digital and analog positive supply voltage inputs. They should always be connected to the same voltage source, but are brought out separately to allow for separate bypass capacitors. Each supply pin should be bypassed with a 0.1 µF ceramic capacitor in parallel with a 10 µF tantalum capacitor to ground. This is the active low interrupt output. INT goes low at the end of each conversion, and returns to a high state following the rising edge of RD . This is the Sample/Hold control input. When this pin is forced low (and CS is low), it causes the analog input signal to be sampled and initiates a new conversion. This is the active low Read control input. When this RD and CS are low, any data present in the output registers will be placed on the data bus. This is the active low Chip Select control input. When low, this pin enables the RD and S /H pins. These pins select the analog input that will be connected to the A/D during the conversion. The input is selected based on the state of S0 and S1 when S /H makes its High-to-Low transition (See the Timing Diagrams). The ADC10664 includes both S0 and S1. The ADC10662 includes just S0. VREF+ These are the reference voltage inputs. They may be placed at any voltage between GND

and VCC, but VREF+ must be greater than VREF-. An input voltage equal to VREF- produces an output code of 0, and an input voltage equal to (VREF+ - 1 LSB) produces an output code of 1023. VIN0, VIN1, VIN2, VIN3 These are the analog input pins. The ADC10662 has two inputs (VIN0 and VIN1) and the ADC10664 has four inputs (VIN0, VIN1, VIN2 and VIN3). The impedance of the source should be less than 500 for best accuracy and conversion speed. For accurate conversions, no input pin (even one that is not selected) should be driven more than 50 mV above VCC or 50 mV below ground.

INT

S /H

RD

CS

GND, AGND, DGND These are the power supply ground pins. The ADC10662 and ADC10664 have separate analog and digital ground pins (AGND and DGND) for separate bypassing of the analog and digital supplies. The ground pins should be connected to a stable, noise-free system ground. Both pins should be returned to the same potential. DB0­ DB9 SPEED These are the TRI-STATE output pins. ADJ By connecting a resistor between this pin and ground, the conversion time can be reduced. The specifications listed in the table of Electrical Characteristics apply for a speed adjust resistor (RSA) equal to 14.0 k (Mode 1) or 8.26 k (Mode 2). See the Typical Performance Curves and the table of Electrical Characteristics.

S0, S1

VREF-,

3

www.national.com

ADC10662/ADC10664

Absolute Maximum Ratings
2)

(Notes 1,

Infrared (15 Sec) Storage Temperature Range Junction Temperature

220°C -65°C to +150°C 150°C

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (V+ = AVCC = DVCC) Voltage at Any Input or Output Input Current at Any Pin (Note 3) Package Input Current (Note 3) Power Dissipation (Note 4) ESD Susceptability (Note 5) Soldering Information (Note 6) N Package (10 Sec) SO Package: Vapor Phase (60 Sec) 260°C 215°C -0.3V to +6V -0.3V to V+ + 0.3V 5 mA 20 mA 875 mW 2000V

Operating Ratings (Notes 1, 2)
Temperature Range ADC10662CIN, ADC10662CIWM, ADC10664CIN, ADC10664CIWM Supply Voltage Range -40°C TA +85°C 4.5V to 5.5V TMIN TA TMAX

Converter Characteristics
The following specifications apply for V+ = +5V, VREF(+) = +5V, VREF(-) = GND, and Speed Adjust pin connected to ground through a 14.0 k resistor (Mode 1) or an 8.26 k resistor (Mode 2) unless otherwise specified. Boldface limits apply for TA = TJ = TMin to TMax; all other limits TA = TJ = +25°C. Symbol Resolution Integral Linearity Error Offset Error Full-Scale Error Total Unadjusted Error Missing Codes Power Supply Sensitivity THD Total Harmonic Distortion (Note 10) V+ = 5V ± 5%, VREF = 4.5V V = 5V ± 10%, VREF = 4.5V fIN = 1 kHz, 4.85 VP-P fIN = 50 kHz, 4.85 VP-P fIN = 100 kHz, 4.85 VP-P fIN = 240 kHz, 4.85 VP-P SNR Signal-to-Noise Ratio (Note 10) fIN = 1 kHz, 4.85 VP-P fIN = 50 kHz, 4.85 VP-P fIN = 100 kHz, 4.85 VP-P ENOB RREF VREF(+) VREF(-) VREF(+) VREF(-) VIN VIN Effective Number of Bits (Note 10) Reference Resistance VREF(+) Input Voltage VREF(-) Input Voltage VREF(+) Input Voltage VREF(-) Input Voltage Input Voltage Input Voltage OFF Channel Input Leakage Current ON Channel Input Leakage Current CS = V+, VIN = V+ CS = V+, VIN = V+ 0.01 fIN = 1 kHz, 4.85 VP-P fIN = 50 kHz, 4.85 VP-P
+

Parameter

Conditions

Typical (Note 7)

Limit (Note 8) 10

Units (Limit) Bits LSB LSB (max) LSB (max) LSB (max) LSB LSB dB

± 0.5

± 0.5 ± 1/16 ± 1 /8
-68 -66 -62 -58 61 60 60 9.6 9.5 650

± 1.0/ ± 1.5 ± 1.5 ±1 ± 1.5/ ± 2.2
0

-60

dB (max) dB dB dB

58

dB (min) dB Bits

9 400 900 V+ + 0.05 GND - 0.05 VREF(-) VREF(+) V+ + 0.05 GND - 0.05 3 -3

Bits (min) (min) (max) V (max) V (min) V (min) V (max) V (max) V (min) µA (max) µA (max)

±1

www.national.com

4

ADC10662/ADC10664

DC Electrical Characteristics
The following specifications apply for V+ = +5V, VREF(+) = 5V VREF(-) = GND, and Speed Adjust pin connected to ground through a 14.0 k resistor (Mode 1) or an 8.26 k resistor (Mode 2) unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = +25°C. Symbol VIN(1) VIN(0) IIN(1) IIN(0) VOUT(1) VOUT(0) IOUT DICC AICC Parameter Logical "1" Input Voltage Logical "0" Input Voltage Logical "1" Input Current Logical "0" Input Current Logical "1" Output Voltage Logical "0" Output Voltage TRI-STATE ® Output Current DVCC Supply Current AVCC Supply Current Conditions V+ = 5.5V V = 4.5V VIN(1) = 5V VIN(0) 0V V+ = 4.5V, IOUT = -360 µA V = 4.5V, IOUT = -10 µA V+ = 4.5V, IOUT = 1.6 mA VOUT = 5V VOUT = 0V CS = S /H = RD = 0 CS = S /H = RD = 0 0.1 -0.1 1.0 30
+ +

Typical (Note 7)

Limit (Note 8) 2.0 0.8

Units (Limits) V (min) V (max) µA (max) µA (max) V (min) V (min) V (max) µA (max) µA (max) mA (max) mA (max)

0.005 -0.005

3.0 -3.0 2.4 4.25 0.4 50 -50 2 45

AC Electrical Characteristics
The following specifications apply for V+ = +5V, tr = tf = 20 ns, VREF(+) = 5V, VREF(-) = GND, and Speed Adjust pin connected to ground through a 14.0 k resistor (Mode 1) or an 8.26 k resistor (Mode 2) unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = +25°C. Symbol Parameter Mode 1 Conversion Time from Rising Edge of S /H to Falling Edge of INT Mode 2 Conversion Time Access Time (Delay from Falling Edge of RD to Output Valid) Access Time (Delay from Falling Edge of RD to Output Valid) Minimum Sample Time TRI-STATE Control (Delay from Rising Edge of RD to High-Z State) Delay from Rising Edge of RD to Rising Edge of INT Delay from End of Conversion to Next Conversion Multiplexer Control Setup Time Multiplexer Hold Time Analog Input Capacitance Logic Output Capacitance Logic Input Capacitance 10 10 35 5 5 Mode 1; CL = 100 pF Mode 2; CL = 100 pF Mode 1 (Figure 1 ) ; (Note 9) RL = 1k, CL = 10 pF 30 CL = 100 pF 60 ns (max) Conditions Typical (Note 7) 360 470 30 475 Limit (Note 8) 466 610 50 616 150 Units (Limits) ns (max) ns (max) ns (max) ns (max) ns (max)

tCONV tCRD tACC1 tACC2 tSH t1H, t0H

tINTH tP tMS tMH CVIN COUT CIN

25

50 50 75 40

ns (max) ns (max) ns (max) ns (max) pF (max) pF (max) pF (max)

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional. These ratings do not guarantee specific performance limits, however. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditons. Note 2: All voltages are measured with respect to GND, unless otherwise specified. Note 3: When the input voltage (VIN) at any pin exceeds the power supply rails (VIN V+) the absolute value of current at that pin should be limited to 5 mA or less. The 20 mA package input current limits the number of pins that can safely exceed the power supplies with an input current of 5 mA to four. Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, JA and the ambient temperature, TA. The maximum allowable power dissipation at any temperature is PD = (TJMAX - TA)/JA or the number given in the Absolute Maximum Ratings, whichever is lower. In most cases, the maximum derated power dissipation will be reached only during fault conditions. For these devices, TJMAX for a board-mounted device can be found from the tables below:

5

www.national.com