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Part: COPCJ842-XXX/WM
Category:
Microcontrollers
-> 8 bit
-> COP8 Family->Mask ROM
Description: COP840CJ - 8-Bit CMOS ROM Based Microcontrollers With 1k or 2k Memory, Comparator And Brown Out Detector, Package: Mdip, Pin Nb=28
Company: National Semiconductor Corporation
Datasheet: Download COPCJ842-XXX/WM datasheet File size : 8710 kB
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Datasheet text preview:
COP820CJ/COP840CJ Family, 8-Bit CMOS ROM Based Microcontrollers with 1k or 2k Memory, Comparator and Brown Out Detector
September 1999
COP820CJ/COP840CJ Family 8-Bit CMOS ROM Based Microcontrollers with 1k or 2k Memory, Comparator and Brown Out Detector
General Description
The COP820CJ/840CJ Family ROM based microcontrollers are integrated COP8TM Base core devices with 1k or 2k memory, an Analog comparator and Brownout detection. These single-chip CMOS devices are suited for lowerfunctionality applications where power and voltage fluctuations are a consideration. Pin and software compatible (no Brownout; different Vcc range) 4k/32k OTP versions are available (COP87LxxCJ/RJ Family) for pre-production, and for use with a range of COP8 software and hardware development tools. Family features include an 8-bit memory mapped architecture, 10MHz CKI with 1us instruction cycle, one multifunction 16-bit timer/counter, MICROWIRE/PLUSTM serial I/O, one analog comparator, power saving HALT mode, MIWU, on-chip R/C oscillator capacitor (COP840CJ), high current outputs, software selectable I/O options, WATCHDOGTM timer, modulator/timer, Brownout detector, Power on Reset, 2.5v-6.0v operation, and 16/20/28 pin packages. In this datasheet, the term COP820CJ refers to packages including the COP820CJ, COP822CJ, and COP823CJ; and COP840CJ refers to COP840CJ, COP842CJ, COP940CJ, and COP942CJ. Devices included in this data sheet are: Device COP820CJ COP822CJ COP823CJ COP840CJ COP940CJ COP842CJ COP942CJ Memory (bytes) 1k ROM 1k ROM 1k ROM 2k ROM 2k ROM 2k ROM 2k ROM RAM (bytes) 64 54 64 128 128 128 128 I/O Pins 24 16 12 24 24 16 16 Packages 28 DIP/SOIC 20 DIP/SOIC 16 SOIC 28 DIP/SOIC 28 DIP/SOIC 20 DIP/SOIC 20 DIP/SOIC Temperature -40 to +85°C -40 to +85°C -40 to +85°C -40 to +85°C -0 to +70°C -40 to +85°C -0 to +70°C 2.5V-4.5V, CJH = 4V-6V Low EMI 2.5V-4.5V, CJH = 4V-6V Comments
Key Features
n n n n n Multi-Input Wake Up (on the 8-bit Port L) Brown out detector Analog comparator Modulator/timer (High speed PWM for IR transmission) 16-bit multi-function timer supporting -- PWM mode -- External event counter mode -- Input capture mode 1024 or 2048 bytes of ROM 64 or 128 bytes of RAM Quiet design (low radiated emissions) Integrated capacitor for the R/C oscillator for COP840CJ
n Schmitt trigger inputs on Port G n MICROWIRE/PLUS serial I/O
CPU/Instruction Set Feature
n 1 µs instruction cycle time n Three multi-source vectored interrupts servicing -- External interrupt with selectable edge -- Timer interrupt -- Software interrupt n 8-bit Stack Pointer (SP) -- stack in RAM n Two 8-bit register indirect data memory pointers (B, X)
n n n n
Fully Static CMOS
n Low current drain (typically < 1 µA) n Single supply operation: 2.5V to 6.0V n Temperature ranges: -0°C to +70°C and -40°C to +85°C
I/O Features
n Software selectable I/O options (TRI-STATE ® output, push-pull output, weak pull-up input, high impedance input) n High current outputs (8 pins) n Packages -- 16 SO with 12 I/O pins for COP820CJ -- 20 DIP/SO with 16 I/O pins -- 28 DIP/SO with 24 I/O pins
Development Support
n Emulation and OTP devices n Real time emulation and full program debug offered by MetaLink Development System
TRI-STATE ® is a registered trademark of National Semiconductor Corporation. COP8TM, MICROWIRETM, MICROWIRE/PLUSTM and WATCHDOGTM are trademarks of National Semiconductor Corporation. iceMASTER ® is a registered trademark of MetaLink Corporation.
© 2000 National Semiconductor Corporation
DS011208
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COP820CJ/COP840CJ Family
Block Diagram
DS011208-1
2k ROM and 128 Bytes RAM for COP840CJ FIGURE 1. Block Diagram
Connection Diagrams
DS011208-5 DS011208-4
DS011208-3
Top View Order Number COPCJ820-XXX/N or COPCJ820-XXX/M, Order Number COPCJ840-XXX/N or COPCJ840-XXX/M, Order Number COPCJ940-XXX/N or COPCJ940-XXX/M See NS Package Number N28B or M28B
Top View Order Number COPCJ822-XXX/N or COPCJ822-XXX/M Order Number COPCJ842-XXX/N or COPCJ842-XXX/M Order Number COPCJ942-XXX/N or COPCJ942-XXX/M See NS Package Number N20A or M20B
Top View Order Number COPCJ823-XXX/WM See NS Package Number M16B
FIGURE 2. Connection Diagrams
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COP820CJ/COP840CJ Family
Connection Diagrams
Port Pin L0 L1 L2 L3 L4 L5 L6 L7 G0 G1 G2 G3 G4 G5 G6 G7 I0 I1 I2 I3 D0 D1 D2 D3 VCC GND CKI RESET Typ. I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I I I I I I O O O O
(Continued)
COP820CJ/COP840CJ Pin Assignment ALT Function MIWU/CMPOUT MIWU/CMPIN- MIWU/CMPIN+ MIWU MIWU MIWU MIWU MIWU/MODOUT INTR 16-Pin 5 6 7 8 9 10 11 12 20-Pin 7 8 9 10 11 12 13 14 17 18 19 TIO SO SK SI CKO 16 1 2 15 20 1 2 3 4 28-Pin 11 12 13 14 15 16 17 18 25 26 27 28 1 2 3 4 7 8 9 10 19 20 21 22 4 13 3 14 6 15 5 16 6 23 5 24
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COP820CJ/COP840CJ Family
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VCC) Voltage at any Pin 7.0V -0.3V to VCC + 0.3V
Total Current into VCC pin (Source) Total Current out of GND pin (sink) Storage Temperature Range
80 mA 80 mA -65°C to +150°C
Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications are not ensured when operating the device at absolute maximum ratings.
DC Electrical Characteristics
-0°C TA + 70°C for COP94x and -40°C TA +85°C for all others Parameter Operating Voltage COP94xCJ COP94xCJH Power Supply Ripple 1 (Note 2) Supply Current (Note 3) CKI = 10 MHz CKI = 4 MHz CKI = 4 MHz CKI = 1 MHz HALT Current with Brown Out Disabled (Note 4) HALT Current with Brown Out Enabled COP840CJ Supply Current (Note 3) CKI = 10 MHz, R = 2.2k CKI = 4 MHz, R = 4.7k CKI = 4 MHz, R = 4.7k CKI = 1 MHz, R = 20k HALT Current with Brown Out Disabled HALT Current with Brown Out Enabled Brown Out Trip Level (Brown Out Enabled) COP840CJ Brown Out Trip Level (Brown Out Enabled) INPUT LEVELS (VIH, VIL) Reset, CKI: Logic High Logic Low All Other Inputs Logic High Logic Low Hi-Z Input Leakage Input Pullup Current L- and G-Port Hysteresis (Note 6) VCC = 6.0V VCC = 6.0V, VIN = 0V -2 -40 COP840CJ 0.05 VCC 0.7 VCC 0.2 VCC +2 -250 0.35 VCC V V µA µA V 0.8 VCC 0.2 VCC V V VCC = 6V, tc = 1 µs VCC = 6V, tc = 2.5 µs VCC = 4.5V, tc = 2.5 µs VCC = 4.5V, tc = 10 µs VCC = 6V, CKI = 0 MHz VCC = 6V, CKI = 0 MHz 1.8 1.9 8.0 6.0 2.5 1.5 mA mA mA mA µA µA VCC = 6V, tc = 1 µs VCC = 6V, tc = 2.5 µs VCC = 4.0V, tc = 2.5 µs VCC = 4.0V, tc = 10 µs VCC = 6V, CKI = 0 MHz VCC = 6V, CKI = 0 MHz 6.0 3.5 2.0 1.5 mA mA mA mA µA Conditions Brown Out Disabled Brown Out Disabled Brown Out Disabled Peak to Peak Min 2.5 2.5 4.5 Typ Max 6.0 4.5 6.0 0.1 VCC Units V V V V
<1 < 50
10
110
µA
< 2.2 < 50
3.1 3.1
8 100
4.2 3.9
V V
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COP820CJ/COP840CJ Family
DC Electrical Characteristics
Parameter Output Current Levels D Outputs: Source Sink L4 L7 Output Sink All Others Source (Weak Pull-up Mode) Source (Push-pull Mode) Sink (Push-pull Mode) TRI-STATE Leakage Allowable Sink/Source Current Per Pin D Outputs L4 L7 (Sink) All Others Maximum Input Current without Latchup (Note 5) RAM Retention Voltage, Vr Input Capacitance Load Capacitance on D2
Note 2: Rate of voltage change must be less than 10 V/mS.
(Continued)
-0°C TA + 70°C for COP94x and -40°C TA +85°C for all others Conditions Min Typ Max Units
VCC = 4.5V, VOH = 3.8V VCC = 2.5V, VOH = 1.8V VCC = 4.5V, VOL = 1.0V VCC = 2.5V, VOH = 0.4V VCC = 4.5V, VOL = 2.5V VCC = 4.5V, VOH = 3.2V VCC = 2.5V, VOH = 1.8V VCC = 4.5V, VOH = 3.8V VCC = 2.5V, VOH = 1.8V VCC = 4.5V, VOL = 0.4V VCC = 2.5V, VOL = 0.4V
-0.4 -0.2 10 2 15 -10 -2.5 -0.4 -0.2 1.6 0.7 -2.0 +2.0 -110 -33
mA mA mA mA mA µA µA mA mA mA mA µA
15 20 3 Room Temperature 500 ns Rise and Fall Time (Min) 7 1000 2.0
mA mA mA mA V pF pF
± 100
Note 3: Supply current is measured after running 2000 cycles with a square wave CKI input, CKO open, inputs at rails and outputs open. Note 4: The HALT mode will stop CKI from oscillating in the RC and crystal configurations. HALT test conditions: L, and G0..G5 ports configured as outputs and set high. The D port set to zero. All inputs tied to VCC. The comparator and the Brown Out circuits are disabled. Note 5: Pins G6 and RESET are designed with a high voltage input network. These pins allow input voltages greater than VCC and the pins will have sink current to VCC when biased at voltages greater than VCC (the pins do not have source current when biased at a voltage below VCC). The effective resistance to VCC is 750 (typical). These two pins will not latch up. The voltage at the pins must be limited to less than 14V.
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Others parts begin by co
CO-1 CO-2 CO-3 CO-4 CO-5 CO-6
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