Details, datasheet, quote on part number: FLINK5V6BT-65
CompanyNational Semiconductor Corporation
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Features, Applications
DS90CF563/DS90CF564 LVDS 18-Bit Color Flat Panel Display (FPD) Link-- 65 MHz

The DS90CF563 transmitter converts 21 bits of CMOS/TTL data into three LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fourth LVDS link. Every cycle of the transmit clock 21 bits of input data are sampled and transmitted. The DS90CF564 receiver converts the LVDS data streams back into 21 bits of CMOS/TTL data. At a transmit clock frequency of 65 MHz, 18 bits of RGB data and 3 bits of LCD timing and control data (FPLINE, FPFRAME, DRDY) are transmitted at a rate of 455 Mbps per LVDS data channel. Using a 65 MHz clock, the data throughput is 171 Mbytes per second. These devices are offered with falling edge data strobes for convenient interface with a variety of graphics and LCD panel controllers. This chipset is an ideal means to solve EMI and cable size problems associated with wide, high speed TTL interfaces.


to 65 MHz shift clk support to 171 Mbytes/s bandwidth Cable size is reduced to save cost 290 mV swing LVDS devices for low EMI Low power CMOS design 550 mW typ) Power-down mode saves power < 0.25 mW) PLL requires no external components Low profile 48-lead TSSOP package Falling edge data strobe Compatible with TIA/EIA-644 LVDS standard Single pixel per clock XGA x 768) Supports VGA, SVGA, XGA and higher 1.3 Gbps throughput

TRI-STATE is a registered trademark of National Semiconductor Corporation.

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VCC) to +6V CMOS/TTL Input Voltage -0.3V to (VCC + 0.3V) CMOS/TTL Output Voltage -0.3V to (VCC + 0.3V) LVDS Receiver Input Voltage -0.3V to (VCC + 0.3V) LVDS Driver Output Voltage -0.3V to (VCC + 0.3V) LVDS Output Short Circuit Duration Continuous Junction Temperature +150C Storage Temperature to +150C Lead Temperature (Soldering, 4 sec) +260C Maximum Package Power Dissipation +25C MTD48 (TSSOP) Package:

DS90CF564 1.89W Package Derating: DS90CF563 16 mW/C above DS90CF564 15 mW/C above +25C This device does not meet 2000V ESD rating (Note 4).

Supply Voltage (VCC) Operating Free Air Temperature (TA) Receiver Input Range Supply Noise Voltage (VCC) Min -10 0 Nom 5.0 +25 Max Units C V mVP-P

Over recommended operating supply and temperature ranges unless otherwise specified Symbol VIH VIL VOH VOL VCL IIN IOS VOD VCM VOH VOL IOS IOZ VTH VTL IIN Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Clamp Voltage Input Current Output Short Circuit Current Differential Output Voltage Change in VOD between Complementary Output States Common Mode Voltage Change in VCM between Complementary Output States High Level Output Voltage Low Level Output Voltage Output Short Circuit Current Output TRI-STATE Current Differential Input High Threshold Differential Input Low Threshold Input Current VIN = +2.4V VIN = 5 pF, Worst Case Pattern (Figure 1, Figure = 5 pF, 16 Grayscale Pattern (Figure 2, Figure 3) VCC = 5.5V VOUT = 100 Power Down = 0V, VOUT 0V or VCC = +1.2V IOH -0.4 mA IOL 2 mA ICL -18 mA VIN = VCC, GND, or 0.4V VOUT 100 250 Conditions Min 2.0 GND Typ Max VCC 0.8 Units A mV CMOS/TTL DC SPECIFICATIONS

TRANSMITTER SUPPLY CURRENT ICCTW Transmitter Supply Current, Worst Case Transmitter Supply Current, 16 Grayscale = 32.5 MHz = 37.5 MHz = 65 MHz = 32.5 MHz = 37.5 MHz = 65 MHz


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