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5474 DM5474 DM7474 Dual Positive-Edge-Triggered D Flip-Flops with Preset Clear and Complementary Outputs
June 1989
5474 DM5474 DM7474 Dual Positive-Edge-Triggered D Flip-Flops with Preset Clear and Complementary Outputs
General Description
This device contains two independent positive-edge-triggered D flip-flops with complementary outputs The information on the D input is accepted by the flip-flops on the positive going edge of the clock pulse The triggering occurs at a voltage level and is not directly related to the transition time of the rising edge of the clock The data on the D input may be changed while the clock is low or high without affecting the outputs as long as the data setup and hold times are not C violated A low logic level on the preset or clear inputs will set or reset the outputs regardless of the logic levels of the Fher inputs ot
eatures
Y
C Alternate Military Aerospace device (5474) is available ontact a National Semiconductor Sales Office Distributor for specifications
onnection Diagram
Dual-In-Line Package
TL F 6526 1
Order Number 5474DMQB 5474FMQB DM5474J DM5474W DM7474M or DM7474N See NS Package Number J14A M14A N14A or W14B
Function Table
Inputs PR L H L H H H CLR H L L H H H CLK X X X D X X X H L X Outputs Q H L H H L Q0 Q L H H L H Q0
u u
L
C
H e High Logic Level X e Either Low or High Logic Level L e Low Logic Level e e Positive-going transition of the clock This configuration is nonstable that is it will not persist when either the preset and or clear Q inputs return to their inactive (high) level e The output logic level of Q before the indicated input conditions were established 0
u
1995 National Semiconductor Corporation
TL F 6526
RRD-B30M105 Printed in U S A
Absolute Maximum Ratings (Note)
p If Military Aerospace specified devices are required lease contact the National Semiconductor Sales S Office Distributors for availability and specifications upply Voltage Input Voltage 7V 5 5V Note The ``Absolute Maximum Ratings'' are those values beyond which the safety of the device cannot be guaranteed The device should not be operated at these limits The parametric values defined in the ``Electrical Characteristics'' table are not guaranteed at the absolute maximum ratings T he ``Recommended Operating Conditions'' table will define the conditions for actual device operation
Operating Free Air Temperature Range R b 55 C to a 125 C DM54 and 54 DM74 0 C to a 70 C Storage Temperature Range
b 65
C to a 150 C
ecommended Operating Conditions
Symbol VCC VIH VIL IOH IOL fCLK tW Parameter Min Supply Voltage High Level Input Voltage Low Level Input Voltage High Level Output Current Low Level Output Current Clock Frequency (Note 2) Pulse Width (Note 2) Clock High Clock Low Clear Low Preset Low tSU tH TA Input Setup Time (Notes 1 Input Hold Time (Notes 1 2) 2) 0 30 37 30 30 20u 5u
b 55
DM5474 Nom 5 Max 55 08
b0 4
DM7474 Min 4 75 2 08
b0 4
Units Max 5 25 V V V mA mA MHz
Nom 5
45 2
16 15 0 30 37 30 30 20u 5u 125 0
16 15
ns
ns ns 70
Free Air Operating Temperature
C
Note 1 The symbol (
u) indicates the rising edge of the clock pulse is used for reference
o E te 2 TA e 25 C and VCC e 5V
lectrical Characteristics over recommended operating free air temperature range (unless otherwise noted)
Symbol VI VOH VOL II IIH Parameter Input Clamp Voltage High Level Output Voltage Low Level Output Voltage Input Current Input Voltage
Max
Conditions VCC e Min II e b12 mA VCC e Min IOH e Max VIL e Max VIH e Min VCC e Min IOL e Max VIH e Min VIL e Max VCC e Max VI e 5 5V VCC e Max VI e 2 4V D Clock Clear Preset
Min
Typ (Note 3)
Max
b1 5
Units V V
24
34 02 04 1 40 80 120 40
b1 6 b3 2 b3 2 b1 6
V mA
High Level Input Current
mA
IIL
Low Level Input Current
VCC e Max VI e 0 4V (Note 6)
D Clock Clear Preset DM54 DM74
b 20 b 18
mA
IOS ICC
Short Circuit Output Current Supply Current
VCC e Max (Note 4)
b 55 b 55
mA mA
VCC e Max (Note 5)
17
30
Note 3 All typicals are at VCC e 5V TA e 25 C Note 4 Not more than one output should be shorted at a time Note 5 With all outputs open ICC is measured with the Q and Q outputs high in turn At the time of measurement the clock is grounded ote 6 Clear is tested with preset high and preset is tested with clear high 2
Switching Characteristics at VCC e 5V and TA e 25 C (See Section 1 for Test Waveforms and Output Load)
Symbol Parameter From (Input) To (Output) Min fMAX tPHL tPLH tPHL tPLH tPHL tPLH Maximum Clock Frequency Propagation Delay Time High to Low Level Output Propagation Delay Time Low to High Level Output Propagation Delay Time High to Low Level Output Propagation Delay Time Low to High Level Output Propagation Delay Time High to Low Level Output Propagation Delay Time Low to High Level Output Preset to Q Preset to Q Clear to Q Clear to Q Clock to Q or Q Clock to Q or Q 15 40 25 40 25 40 25 RL e 400X CL e 15 pF Max MHz ns ns ns ns ns ns Units
3
