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Details, datasheet, quote on part number:LM2633
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| Part: | LM2633 |
| Category: | Power Management => Regulators => Switching Regulators |
| Description: | LM2635 - 5-Bit Programmable Synchronous Buck Regulator Controller Not Recommended For Designs , Package: Soic Wide, Pin Nb=20 |
| Company: | National Semiconductor Corporation |
| Datasheet: | Download LM2633 datasheet File size : 295 kB |
| Request For quote: | Find where to buy LM2633
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Datasheet text preview:
LM2635 5-Bit Programmable Synchronous Buck Regulator Controller
May 2000
LM2635 5-Bit Programmable Synchronous Buck Regulator Controller
General Description
The LM2635 is a high speed controller designed specifically for use in synchronous DC/DC buck converters for the PentiumTM II or Deschutes microprocessor. A 5-bit DAC accepts the VID code directly from the CPU and adjusts the output voltage from 1.8V to 3.5V. It provides the power good, over-voltage protection, and output enable features as required by Intel VRM specifications. Current limiting is achieved by monitoring the voltage drop across the rDS_ON of the high side MOSFET, which eliminates an expensive current sense resistor. The LM2635 employs a fixed-frequency voltage mode PWM architecture. To provide a faster response to a large and fast load transient, two ultra-fast comparators are built in to monitor the output voltage and override the primary control loop when necessary. The PWM frequency is adjustable from 50 kHz to 1 MHz through an external resistor. The wide range of PWM frequency gives the power supply designer the flexibility to make trade-offs between load transient response performance, MOSFET cost and the overall efficiency. The adaptive non-overlapping MOSFET gate drivers help avoid any potential shoot-through problem while maintaining high efficiency. BiCMOS gate drivers with rail-to-rail swing ensure that no spurious turn-on occur. When only 5V is available, a bootstrap structure can be employed to accommodate an NMOS high side switch. The precision reference trimmed to 2% over temperature is available externally for use by other regulators. Dynamic positioning of load voltage, which helps cut the number of output capacitors, can also be implemented easily.
Features
n n n n n n n n n n n 1.8V to 3.5V 5-bit programmable output voltage Synchronous rectification Power Good flag and output enable Over-voltage protection Initial Output Accuracy: 2% over temperature Current limit without external sense resistor Adaptive non-overlapping MOSFET gate drives Adjustable switching frequency: 50 kHz to 1 MHz Dynamic output voltage positioning 1.256V reference voltage available externally Plastic SO-20 package
Applications
n Motherboard power supply/VRM for Cyrix Gxm, Cyrix Gxi, Cyrix MII, Pentium II, Deschutes, Pentium Pro, 6x86 and K6 processors n 5V to 1.8V 3.5V high current power supplies
Typical Application
DS100119-1
FIGURE 1. 5V to 1.8V 3.5V, 14A Power Supply
PentiumTM is a trademark of Intel Corporation.
© 2000 National Semiconductor Corporation
DS100119
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LM2635
Connection Diagram
TOP VIEW PWRGD (Pin 13): Power Good. There are two windows around the DAC output voltage that are associated with PWRGD pin, the ± 10% window and the ± 8% window. If PWRGD is initially high (open drain state) and output voltage travels out of ± 10% window, PWRGD goes to low (low impedance to ground). If PWRGD is initially low and output voltage travels into the ± 8% window and has stayed within the window for at least 10 ms, PWRGD goes to high. A PWRGD high means the output voltage is at least within the ± 10% window whereas a PWRGD low indicates the output voltage is definitely outside the ± 8% window. VID4:0 (Pins 14, 15, 16, 17, 18): Voltage Identification Code. The five pins accept an open-ground pattern 5-bit binary code from outside the chip (typically from the CPU) for generating the desired output voltage. Each VID pin is internally pulled up to VCC via a 90 µA current source. Table 1 shows the code table. OUTEN (Pin 19): Output Enable. The output voltage is disabled when this pin is pulled low. It is internally pulled up to VCC via a 90 µA current source. HSGATE (Pin 20): Gate drive for the high-side N-channel MOSFET. This signal is interlocked with LSGATE (Pin 1) to avoid a shoot-through problem. TABLE 1. VID Code and DAC Output VID4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 VID3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 VID2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 VID1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 VID0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Rated Output Voltage (V) (#) (1.30) (#) (1.35) (#) (1.40) (#) (1.45) (#) (1.50) (#) (1.55) (#) (1.60) (#) (1.65) (#) (1.70) (#) (1.75) 1.80 1.85 1.90 1.95 2.00 2.05 (shutdown) 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0
DS100119-3
Plastic SO-20 Order Number LM2635M See NS Package Number M20B
Pin Descriptions
LSGATE (Pin 1): Gate drive for the low-side N-channel MOSFET. This signal is interlocked with HSGATE (Pin 20) to avoid a shoot-through problem. BOOTV (Pin 2): Power supply for high-side N-channel MOSFET gate drive. The voltage should be at least one gate threshold above the converter input voltage to properly operate the high-side N-FET. PGND (Pin 3): Ground for high current circuitry. It should be connected to system ground. SGND (Pin 4): Ground for signal level circuitry. It should be connected to system ground. VCC (Pin 5): Power supply for the controller. SENSE (Pin 6): Converter output voltage sensing. It provides input for power good, fast dual comparator control loop, and over-voltage protection circuitry. It is recommended that a 0.1 µF capacitor be connected between this pin and ground to avoid potential noise problems. IMAX (Pin 7): Current limit threshold setting. It sinks a fixed 180 µA current. By connecting a resistor between the high side MOSFET drain and this pin, a fixed voltage drop can be built across the resistor. This voltage drop is compared with the VDS of the high-side N-MOSFET to determine if an overcurrent condition has occurred. IFB (Pin 8): High-side N-MOSFET source voltage sensing. This pin is one VDS below drain voltage. When this voltage is lower than that of IMAX pin during the time the high-side FET is on, it means VDS is higher than the preset voltage across the IMAX resistor, which can be interpreted as an overcurrent condition. VREF (Pin 9): Bandgap reference voltage. This voltage is mainly for use by other power supplies on the motherboard which need a reference. EA_OUT (Pin 10): Output of the error amplifier. The voltage level on this pin is compared with an internally generated ramp signal to determine the duty cycle. This pin is necessary for compensating the primary control loop. FB (Pin 11): Inverting input of the error amplifier. A pin necessary for compensating the control loop. FREQ_ADJ (Pin 12): Switching frequency adjustment. Switching frequency can be adjusted by changing the grounding resistance on this pin.
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LM2635
Pin Descriptions
VID4 1 1 1 1 1 VID3 0 0 0 0 0 VID2 1 0 0 0 0 VID1 0 1 1 0 0
(Continued)
TABLE 1. VID Code and DAC Output (Continued) VID0 0 1 0 1 0 Rated Output Voltage (V) 3.1 3.2 3.3 3.4 3.5
#: These voltages are disabled, can be enabled upon request.
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