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Part: LM2893N
Category:
Interface and Interconnect
-> Line Drivers
-> Transceiver
Description: Carrier-current Transceiver.
Company: National Semiconductor Corporation
Datasheet: Download LM2893N datasheet File size : 634 kB
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Datasheet text preview:
LM1893 LM2893 Carrier-Current Transceiver
April 1995
G LM1893 LM2893 Carrier-Current Transceiver
eneral Description
Carrier-current systems use the power mains to transfer information between remote locations This bipolar carriercurrent chip performs as a power line interface for half-duplex (bi-directional) communication of serial bit streams of virtually any coding In transmission a sinusoidal carrier is FSK modulated and impressed on most any power line via a rugged on-chip driver In reception a PLL-based demodulaA tor and impulse noise filter combine to give maximum range complete system may consist of the LM1893 a COPSTM F controller and discrete components
Y Y Y Y Y
Output power easily boosted 10-fold 50 to 300 kHz carrier frequency choice TTL and MOS compatible digital levels Regulated voltage to power logic Drives all conventional power lines
Applications
Y Y Y
eatures
Y Y Y Y Y
Y Y Y Y Y
Noise resistant FSK modulation User-selected impulse noise filtering Up to 4 8 kBaud data transmission rate Strings of 0's or 1's in data allowed Sinusoidal line drive for low RFI
Energy management systems Home convenience control Inter-office communication Appliance control Fire alarm systems Security systems Telemetry Computer terminal interface
Typical Application
TL H 6750 1
FIGURE 1 Block diagram of carrier current chip with a complement of discrete components making a complete B FO e 125 kHz fDATA e 360 Baud transceiver Use caution with this circuit dangerous line voltage is present
C CLINETM and COPSTM are trademarks of National Semiconductor Corp Iarrier-Current Transceivers are also called Power Line Carrier (PLC) transceivers
1995 National Semiconductor Corporation
TL H 6750
RRD-B30M115 Printed in U S A
Absolute Maximum Ratings
p If Military Aerospace specified devices are required lease contact the National Semiconductor Sales S Office Distributors for availability and specifications upply voltage Voltage on pin 12 Voltage on pin 10 (Note 1) Voltage on pins 5 and 17 5 6 V DC zener current Junction temperature transmit mode receive mode G Electro-Static Discharge (120 pF 1500X) 30 V 55 V 41 V 40 V 100 mA 150 C 125 C 1KV M p aximum continuous dissipation TA e 25 C lastic DIP N (Note 2) transmit mode 1 66 W receive mode 1 33 W b 40 to 85 C Operating ambient temp range b 65 to 150 C Storage temperature range Lead temp soldering 7 seconds 260 C Note Absolute maximum ratings indicate limits beyond which damage to the device may occur Electrical specifications are not ensured when operating the device above guaranteed limits but below absolute maximum limits but there will be no device degradation
eneral Electrical Characteristics
(Note 3) The test conditions are V a e 18V and FO e 125 kHz unless otherwise noted
Parameter
T
est Limit (Note 4) 52 9 60 41 50 08 28
b1 0 2 b1
Conditions Pin 11 IZ e 2 mA Pin 11 RZ e (VZ
10
Typical 56
Design Limit (Note 5)
Limit Units V min V max X V max V min V max X V max V min mA min mA max
1 2 3 4 5 7 6 8 9
5 6 V Zener voltage VZ 5 6 V Zener resistance RZ t arrier I O peak survivable C ransient voltage VOT Carrier I O clamp voltage VOC Carrier I O clamp resistance R10 TX RX low input voltage VIL TX RX high input voltage VIH TX RX low input current IIL TX RX high input current IIH
mA b VZ
1
mA) (10 mA b 1 mA)
5 80 44 20 18 22
b2
Pin 10 discharge 1 mF cap charged to VOT thru k 1X 2 in 10 IOC e 10 mA RX mode P N2222 diode pin 8 to 9 Pin 10 IOC e 10 mA Pin 5 Pin 5 (Note 9) Pin 5 at 0 8 V Pin 5 at 40 V Time to develop 63% of full current drive thru pin 10 1 bit time TB e 1 (2FDATA) Time TTR is user controlled with CM see Apps Info FX mode RO e 6 65 kX CO e 560 pF T 0 e (F1 a F2) 2 TX or RX mode (FOMAX b FOMIN) (TJMAX b TJMIN) TX or RX mode b40 s TJ s TJMAX
1 0b4 10 2 125
b 100
g2 0
0
1 0 11 12 1 3 1T 4 RX b TX switch-over time TRT TX b RX switch-over time TTR ICO initial accuracy of FO ICO temperature coefficient of FO Temperature drift of FO
10
mA min mA max ms bit
113 137
g5 0
kHz min kHz max PPM C % max
(Note 3) The test conditions are V a e 18 V and FO e 125 kHz T unless otherwise noted The transmit center frequency is FO FSK low is F1 and FSK high is F2
Parameter
ransmitter Electrical Characteristics
Conditions Meets test 17 spec at TJ e 25 C and l l (F1 14V b F1 18V ) F1 18V l k 0 01 (F1 24V b F1 18V ) F1 18V l k 0 01 p in 15 Pin 12 high IQT is IQ through P in 15 and the average current IODC of the Carrier I O through pin 10 100X load on pin 10 2 Pin 10 Set internally be ALC N2222 diode pin 8 to 9 Q of 10 tank driving 10X line 1 00X load no tank (F2 b F1) ( F2 a F1 2) Pin 17 Pin 17 (Note 9) Pin 17 at 0 8 V Pin 17 at 40 V 2
Typical 13 40 52
est Limit (Note 4) 14 24 79
Design Limit (Note 5) 15 23
Limit Units V min V max mA max
15
Supply voltage V a range
16
Total supply current IQT
17 8 1 9 2 0 2 21 22 3 2 4
Carrier I O output current IO Carrier I O lower swing limit VALC THD of IO (Note 6) FSK deviation F2 b F1 Data In low input voltage VIL Data In high input voltage VIH Data In low input current IIL Data In high input current IIH
70 47 06 55 44 17 21
b1
45 40 57 50 9 57 3 2 08 28
b1 0 1 b1
mApp min V min V max % max % max % min % max V max V min mA min mA max 0 mA min mA max
1 0b4
10
Receiver Electrical Characteristics (Note 3) The test conditions are V a e 18 V FO e 125 kHz g2 2% deviation FSK FDATA e 2 4 kHz VIN e 100 mVpp in the receive mode unless otherwise noted T
Parameter
Conditions Functional receiver (Note 7) (QT is pin 15 (V a ) plus pin 10 I Carrier I O) current 2 4 kX Pin 13 to GND Pin 10 Functional receiver (Note 7) CF e 100 pF 2 RF e 0X no tank 4 kHz e 4 8 kBaud CF e 100 pF RF e 0 X CF e 100 pF RF e 0 X For a functional receiver (Note 8) Referred to chip side (pin 10) of the line-coupling XFMR FO e 50 kHz FO e 300 kHz Referred to line side of XFMR (assuming a 7 07 1 XFMR) FO e 50 kHz FO e 300 kHz Pin 10 lower than pin 15 by VINDC Pin 12 leakage I s 20 mA Pin 12 sat voltage at IOL e 2 mA Pin 13 charge and discharge current Pin 6 Pin 6 V(pin 3) b V(pin 4) e g 250 mV b in 6 TX mode Bias pin 6 as it selfP iased during test 31 I Bias pins 3 and 4 at 8 5 V PC e I(pin 3) a I(pin 4) TX mode Pins 3 and 4 RPD e (V 100mA b V
50mA)
Typical 12 3 7 11 19 5 10
est Limit (Note 4) 13 30 5 14 34 1 0 48
Design Limit (Note 5) 13 5 28
Limit Units V min V max mA min mA max kX min kX max
25 2 6 2 7 2 8
Supply voltage V a range Supply current IQT Carrier I O input resistance R10 Max data rate FMD
24
kBaud
3 29 30 1
PLL capture range FC PLL lock range FL Receiver input sensitivity SIN
g 40 g 45
g 15 g 15
g 10
% min % min
18 20 14 0 26 0 29 0 20 2 70 0 15
g 55
10
12
mVRMS mVRMS mVRMS mVRMS mVRMS mVRMS V max V min V max mA min mA max V min V max mA min mA max
32 33 34 5 3 6 3 7 3 8 3 9 4 0 4 1 4 2 4 N 3
r olerable input dc voltage offset T ange VINDC Data Out breakdown voltage Data Out low output VOL Impulse noise filter current II Offset hold cap bias voltage VCM c ffset hold capacitor max drive O urrent IMCM Offset hold bias current IOHB Phase comparator current IPC Phase detector output resistance R
PD
01 55 04
g 45 g 85
20
g 55
3 13 5
g 25 g 80
b0 5
b 20
b 40
40 100 10 50 200 6 18 60 180 0 70 1 20
nA min nA max mA min mA max kX min kX max mVpp min mVpp max V V min V V max dB min
(50mA) 100 0 95 80
v Phase detector demodulated output oltage VPD - ast offset cancel voltage ``window'' F to-VPD ratio VW VPD Power supply rejection PSRR
Pin 3 to 4 measured after filtering out the 2FO component VPIN3 b VPIN4 e g VWINDOW a DC offset Drive for g 1 mA pin 6 current CL e 0 1 mF PSRR e CMRR 120 Hz
ote 1 More accurately the maximum voltage allowed on pin 10 is VOC and VOC ranges from 41 to 50V Also transients may reach above 60V see the transient N peak voltage characteristic curve ote 2 The maximum power dissipation rating should be derated for device operation above 25 C to insure that the junction temperature remains below the maximum rating Use a iJA of 75 C W for the N package using a socket in still air (which is the worst case) Consult the Application Information section for more N detail ote 3 The boldface values apply over the full junction temperature range for the specified supply voltage range All other numbers apply at TA e TJ e 25 C Pin N numbers refer to LM1893 LM2893 tested by shorting Carrier In to Carrier Out and testing it as an LM1893 Note 4 Guaranteed and 100% production tested ote 5 Guaranteed (but not 100% production tested) over the temperature and supply voltage ranges These limits are not used to calculate outgoing quality N levels Note 6 Total harmonic distortion is measured using THD e IRMS (all components at or above 2FO) IRMS (fundamental) ote 7 Receiver function is defined as the error-free passage of 1 cycle of 50% duty-cycle 2 4 kHz square-wave data (2 sequential 208 mS bits) with the first bit being a ``1 '' All of the data transitions (edges) must fall within g 10% ( g 20 8 ms) of their noise-free positions RX time delay is minimized by using no impulse noise Nter cap CI for this test fil ote 8 During the sensitivity check note 7 requirements are followed with these exceptions (1) data rate FDATA e 1 2 kHz (2) all of the data transitions must fall bit or 208 ms (CI is within g 20% ( g 41 6 ms) of their noise-free positions and (3) a time-domain filter capacitor (CI) is used The time delay of CI is N approximately 6200 pF) ote 9 For TTL compatibility use a pull-up resistor to increase min VOH to ab3ve 2 8 V o
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