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Part: LM3146
Category:
Discrete
-> Transistors
-> Bipolar
-> Bipolar Array
-> High Voltage
Description: High Voltage Transistor Array (discontinued)
Company: National Semiconductor Corporation
Datasheet: Download LM3146 datasheet File size : 1094 kB
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Datasheet text preview:
LM3146 High Voltage Transistor Array
February 1995
LM3146 High Voltage Transistor Array
General Description
The LM3146 consists of five high voltage general purpose T silicon NPN transistors on a common monolithic substrate wo of the transistors are internally connected to form a differentially-connected pair The transistors are well suited to a wide variety of applications in low power system in the dc through VHF range They may be used as discrete transistors in conventional circuits however in addition they provide the very significant inherent integrated circuit advantages of close electrical and thermal matching The LM3146 is supplied in a 14-lead molded dual-in-line package for applications requiring only a limited temperature range
Y Y Y Y Y
eatures
High voltage matched pairs of transistors VBE matched g 5 mV input offset current 2 mA max at IC e 1 mA Five general purpose monolithic transistors Operation from dc to 120 MHz Wide operating current range Low noise figure 3 2 dB typ at 1 kHz
Applications
General use in all types of signal processing systems operating anywhere in the frequency range from dc to F VHF Y Custom designed differential amplifiers Y Temperature compensated amplifiers
Y
Connection Diagram
Dual-In-Line and Small Outline Packages
TL H 7959 1
Top View Order Number LM3146M or LM3146N See NS Package Number M14A or N14A
C1995 National Semiconductor Corporation
TL H 7959
RRD-B30M115 Printed in U S A
Absolute Maximum Ratings
p If Military Aerospace specified devices are required lease contact the National Semiconductor Sales Office Distributors for availability and specifications L M3146 Units Power Dissipation Each transistor TA e 25 C to 55 C 300 mW TA l 55 C Derate at 6 67 mW C Power Dissipation Total Package DTA e 25 C TA l 25 C Collector to Emitter Voltage VCEO Collector to Base Voltage VCBO Collector to Substrate Voltage V CIO (Note 1) Emitter to Base Voltage VEBO (Note 2) Collector to Current IC Operating Temperature Range Storage Temperature Range 500 mW Derate at 6 67 mW C 30 40 40 5 50 b 40 to a 85
b 65 to a 150
Soldering Information Dual-In-Line Package Soldering (10 seconds) Small Outline Package Vapor Phase (60 seconds) Infrared (15 seconds)
260 C 215 C 220 C
See AN-450 ``Surface Mounting Methods and Their Effect on Product Reliability'' for other methods of soldering surface mount devices
V V V V mA
C C
C Electrical Characteristics TA e 25 C
Symbol V(BR)CBO V(BR)CEO V(BR)CIO V(BR)EBO ICBO ICEO hFE Parameter Collector to Base Breakdown Voltage Collector to Emitter Breakdown Voltage Collector to Substrate Breakdown Voltage Emitter to Base Breakdown Voltage (Note 2) Collector Cutoff Current Collector Cutoff Current Static Forward Current Transfer Ratio (Static Beta) Input Offset Current for Matched Pair Q1 and Q2 Base to Emitter Voltage Magnitude of Input Offset Voltage for Differential Pair Temperature Coefficient of Base to Emitter Voltage Collector to Emitter Saturation Voltage Temperature Coefficient of Input Offset Voltage Conditions Min IC e 10 mA IE e 0 IC e 1 mA IB e 0 ICI e 10 mA IB e 0 IE e 0 IC e 0 IE e 10 mA VCB e 10V IE e 0 VCE e 10V IB e 0 IC e 10 mA VCE e 5V IC e 1 mA VCE e 5V IC e 10 mA VCE e 5V IC1 e 1C2 e 1 mA VCE e 5V IC e 1 mA VCE e 3V VCE e 5V IE e 1 mA VCE e 5V IE e 1 mA IC e 10 mA IB e 1 mA IC e 1 mA VCE e 5V 0 63 30 40 30 4 0 Limits Typ 72 56 72 7 0 002 (Note 3) 85 100 90 0 3 2 0 83 5 mA V mV mV C V mV C 100 5 Max V V V V nA mA Units
5
IB1 IB2 VBE VBE1 VBE2 DVBE DT VCE(SAT) DV10 DT
0 73 0 48
b1 9
0 33 11
Note 1 The collector of each transistor is isolated from the substrate by an integral diode The substrate must be connected to a voltage which is more negative than any collector voltage in order to maintain isolation between transistors and provide normal transistor action To avoid undesired coupling between transistors N e substrate terminal should be maintained at either dc or signal (ac) ground A suitable bypass capacitor can be used to establish a signal ground h Note 2 If the transistors are forced into zener breakdown (V(BR)EBO) degradation of forward transfer current ratio (hFE) can occur ote 3 See curve 2
AC Electrical Characteristics
Symbol NF fT CEB CCB CCI Parameter Low Frequency Noise Figure Gain Bandwidth Product Emitter to Base Capacitance Collector to Base Capacitance Collector to Substrate Capacitance Conditions Min f e 1 kHz VCE e 5V IC e 100 mA RS e 1 kX VCE e 5V IC e 3 mA VEB e 5V IE e 0 VCB e 5V IC e 0 VCI e 5V IC e 0 300 Limits Typ 3 25 Max dB MHz pF pF pF Units
500 0 70 0 37 22
Low Frequency Small Signal Equivalent Circuit Characteristics hfe hie hoe hre Forward Current Transfer Ratio Short Circuit Input Impedance Open Circuit Output Impedance Open Circuit Reverse Voltage Transfer Ratio f e 1 kHz VCE e 3V IC e 1 mA f e 1 kHz VCE e 3V IC e 1 mA f e 1 kHz VCE e 3V IC e 1 mA f e 1 kHz VCE e 3V IC e 1 mA 100 35 15 6 1 8 x 10b4 kX mmho
Admittance Characteristics Yfe Yie Yoe Yre Forward Transfer Admittance Input Admittance Output Admittance Reverse Transfer Admittance f e 1 MHz VCE e 3V IC e 1 mA f e 1 MHz VCE e 3V IC e 1 mA f e 1 MHz VCE e 3V IC e 1 mA f e 1 MHz VCE e 3V IC e 1 mA 31 b j 1 5 0 3 a j 0 04 0 001 a j 0 03 (Note 3) mmho mmho mmho mmho
Note 1 The collector of each transistor is isolated from the substrate by an integral diode The substrate must be connected to a voltage which is more negative than any collector voltage in order to maintain isolation between transistors and provide normal transistor action To avoid undesired coupling between transistors N e substrate terminal should be maintained at either dc or signal (ac) ground A suitable bypass capacitor can be used to establish a signal ground h Note 2 If the transistors are forced into zener breakdown (V(BR)EBO) degradation of forward transfer current ratio (hFE) can occur ote 3 See curve 3
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