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Details, datasheet, quote on part number:LM78M06
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Datasheet text preview:
LM78 Microprocessor System Hardware Monitor
February 2000
LM78 Microprocessor System Hardware Monitor
General Description
The LM78 is a highly integrated Data Acquisition system for hardware monitoring of servers, Personal Computers, or virtually any microprocessor based system. In a PC, the LM78 can be used to monitor power supply voltages, temperatures, and fan speeds. Actual values for these inputs can be read at any time, and programmable WATCHDOG limits in the LM78 activate a fully programmable and maskable interrupt system with two outputs. The LM78 has an on-chip temperature sensor, 5 positive analog inputs, two inverting inputs (for monitoring negative voltages), and an 8-bit ADC. An input is provided for the overtemperature outputs of additional temperature sensors and this is linked to the interrupt system. The LM78 provides inputs for three fan tachometer outputs. Additional inputs are provided for Chassis Intrusion detection circuits, VID monitor inputs, and chainable interrupt. The LM78 provides both ISA and Serial Bus interfaces. A 32-byte auto-increment RAM is provided for POST (Power On Self Test) code storage.
Features
n n n n n n n n n Temperature sensing 5 positive voltage inputs 2 op amps for negative voltage monitoring 3 fan speed monitoring inputs Input for additional temperature sensors Chassis Intrusion Detector input WATCHDOG comparison of all monitored values POST code storage RAM ISA and I2CTM Serial Bus interfaces
Key Specifications
j Voltage monitoring
accuracy
j Temperature Accuracy
± 1% (max) ± 3°C (max)
5V Operating: Shutdown: 1 mA typ 10 µA typ 8 Bits
-10°C to +100°C
j Supply Voltage j Supply Current j ADC Resolution
Applications
n System Hardware Monitoring for Servers and PCs n Office Electronics n Electronic Test Equipment and Instrumentation
Typical Application
DS012873-1
# indicates Active Low ("Not")
I2C ® is a registered trademark of the Phillips Corporation.
© 2001 National Semiconductor Corporation
DS012873
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LM78
Ordering Information
Temperature Range -10°C TA +100°C Order Number LM78CCVF Device Marking LM78CCVF-J VGZ44A Package
Connection Diagram
DS012873-2
Block Diagram
DS012873-3
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LM78
Pin Descriptions
Pin Name(s) IORD IOWR SYSCLK D7 D0 VCC (+5V) GNDD SMI__IN Pin Number 1 2 3 4 11 12 13 14 Number of Pins 1 1 1 8 1 1 1 Type Digital Input Digital Input Digital Input Digital I/O POWER GROUND Digital Input Description An active low standard ISA bus I/O Read Control. An active low standard ISA bus I/O Write Control. The reference clock for the ISA bus. Typically ranges from 4.167 MHz to 8.33 MHz. The minimum clock frequency this input can handle is 1 Hz. Bi-directional ISA bus Data lines. D0 corresponds to the low order bit, with D7 the high order bit. +5V VCC power. Bypass with the parallel combination of 10 µF (electolytic or tantalum) and 0.1 µF (ceramic) bypass capacitors. Internally connected to all digital circuitry. Chainable SMI (System Management Interrupt) Input. This is an active low input that propagates the SMI signal to the SMI output of the LM78 via SMI Mask Register Bit 6 and SMI enable Bit 1 of the Configuration Register. An active high input from an external circuit which latches a Chassis Intrusion event. This line can go high without any clamping action regardless of the powered state of the LM78. The LM78 provides an internal open drain on this line, controlled by Bit 7 of NMI Mask Register 2, to provide a minimum 20 ms reset of this line. An active low push-pull output intended to drive an external P-channel power MOSFET for software power control. 0V to +5V amplitude fan tachometer input. Serial Bus Clock. Serial Bus bidirectional Data. Master Reset, 5 mA driver (open drain), active low output with a 20 ms minimum pulse width. Available when enabeld via Bit 7 in SMI Mask Register 2. NAND Tree totem-pole output that provides board-level connectivity testing. Refer to Section 11.0 on NAND Tree testing. Internally connected to all analog circuitry. The ground reference for all analog inputs. Ground-referred inverting op amp input. Refer to Section 4.0, "ANALOG INPUTS". Output of inverting op amp for Input 6. Refer to section 4.0, "ANALOG INPUTS". Output of inverting op amp for Input 5. Refer to section 4.0, "ANALOG INPUTS". Ground-referred inverting op amp input. Refer to Section 4.0, "ANALOG INPUTS". 0V to 4.096V FSR Analog Inputs. Voltage Supply readouts from P6. This value is read in the VID/Fan Divisor Register. Board Temperature Interrupt driven by O.S. outputs of additional temperature sensors such as LM75. Provides internal pull-up of 10 k. Non-Maskable Interrupt (open source)/Interrupt Request (open drain). The mode is selected with Bit 5 of the Configuration Register and the output is enabled when Bit 2 of the Configuration Register is set to 1. The default state is disabled and IRQ mode. System Management Interrupt (open drain). This output is enabled when Bit 1 in the Configuration Register is set to 1. The default state is disabled.
Chassis Intrusion
15
1
Digital I/O
Power Switch Bypass FAN3 FAN1 SCL SDA RESET
16
1
Digital Output
17 19 20 21 22
3 1 1 1
Digital Input Digital Input Digital I/O Digital Output
NTEST GNDA -IN6 FB6 FB5 -IN5 IN4 IN0 VID3 VID0 BTI NMI/IRQ
23 24 25 26 27 28 29 33 34 37 38 39
1 1 1 1 1 1 5 4 1 1
Test Output GROUND Analog Input Analog Output Analog Output Analog Input Analog Input Digital Input Digital Input Digital Output
SMI
40
1
Digital Output
3
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