|Description||Digitally-controlled Stereo Tone And Volume Circuit With Three Selectable Stereo Inputs|
|Company||National Semiconductor Corporation|
|Datasheet||Download LMC1983CIN datasheet
|LMC1983 Digitally-Controlled Stereo Tone and Volume Circuit with Three Selectable Stereo Inputs
The is a monolithic integrated circuit that provides volume, balance, tone (bass and treble), loudness controls and selection between three pairs of stereo inputs. These functions are digitally controlled through a three-wire communication interface. There are two digital inputs for easy interface to other audio peripherals such as stereo decoders. The LMC1983 is designed for line level input signals (300 mV2V) and has a maximum gain of -0.5 dB. Volume is set at minimum and tone controls are flat when supply voltage is first applied. Low noise and distortion result from using analog switches and poly-silicon resistor networks in the signal path. Additional tone control can be achieved using the LMC835 stereo 7-band graphic equalizer connected to the LMC1983's SELECT OUT/SELECT IN external processor loop. Three pairs of stereo inputs Loudness compensation 40 position 2 dB/step volume attenuator plus mute Independent left and right volume controls Low noise-suitable for use with DNR ® and Dolby ® noise reduction External processor loop Signal handling suitable for compact discs Pop-free switching Serially programmable: INTERMETAL bus (IM) interface to 12V single supply operation 28 Pin DIP or PLCC PackageApplications
Stereo television Music reproduction systems Sound reinforcement systems Electronic music (MIDI) Personal computer audio controlFeatures
DNR is a registered trademark of National Semiconductor Corporation. Dolby is a registered trademark of Dolby Labs.
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (V+ - GND) Voltage at any Pin Input Current at any Pin (Note 3) Package Input Current (Note 3) Power Dissipation (Note 4) Junction Temperature Storage Temperature 15V GND to +150°C
Lead Temperature N Package, (Soldering, 10 Seconds) V Package, (Vapor Phase, 60 Seconds) Infrared, (15 Seconds) ESD Susceptability (Note 5)Temperature Range LMC1983CIN, LMC1983CIV Supply Voltage Range (V+ - V-) TMIN TA TMAX to 12V
The following specifications apply for = 9V, fIN = 1 kHz, input signal (300 mV) applied to INPUT 1, volume = 0 dB, bass = 0 dB, treble = 0 dB, and loudness is off unless otherwise specified. All limits apply for = +25°C. Symbol IS VIN THD Parameter Supply Current Input Voltage Total Harmonic Distortion Clipping Level (1.0% THD), Select Out (Pins 7, 22) Left and Right channels; Output Pins 13, 16 VIN = 0.3 Vrms; fIN = 100 Hz, 1 kHz, 10 kHz VIN = 2.0 Vrms; fIN = 100 Hz, 1 kHz VIN = 2.0 Vrms; fIN = 10 kHz VIN = 0.5 Vrms; Bass and Treble Tone Controls Set at Maximum VIN = 0.3 Vrms; Volume Attenuator at -20 dB, Bass and Treble DC Shifts Tone Controls Set at Maximum VIN = 0.3 Vrms; between Any Two Adjacent Control Settings VIN = 0.3 Vrms; All Mode and Input Positions ROUT RIN AC Output Impedance AC Input Impedance Volume Attenuator Range Pins (470 to Ground at Input) Pins 13, 16 Pins 13, 16; Volume Attenuation 0100010XXX000000 (0 dB) 0100010XXX101XXX (80 dB); (Relative to Attenuation at the 0 dB Setting) Volume Step Size All Volume Attenuation Settings from 0100010XXX101XXX (80 dB) 0100010XXX000000 (0 dB) (Note dB (min) dB (min) 82 dB (min) dB (max) k (max) k (min) dB (max) mV (max) mV (max) % (max) % (max) % (max) Conditions Typical (Note 15 2.3 Limit (Note 25 2.0 Unit (Limit) mA (max) Vrms (min)
The following specifications apply for = 9V, fIN = 1 kHz, input signal (300 mV) applied to INPUT 1, volume = 0 dB, bass = 0 dB, treble = 0 dB, and loudness is off unless otherwise specified. All limits apply for = +25°C. Conditions All Volume Attenuation Settings from Channel-to-Channel Tracking Error 0100010XXX100110 (76 dB) 0100010XXX000000 (0 dB) from 0100010XXX101XXX (80 dB) 0100010XXX100111 (78 dB) Mute Attenuation Bass Gain Range Bass Tracking Error Bass Step Size Treble Gain Range Treble Tracking Error Treble Step Size Frequency Response VIN = 1.0 Vrms fIN = 100 Hz, Pins 13, 16 fIN = 100 Hz, Pins 13, 16 fIN = 100 Hz, Pins 13, 16 (Relative to Previous Level) fIN = 10 kHz, Pins 13, 16 fIN = 10 kHz, Pins 13, 16 fIN = 10 kHz, Pins 13, 16 (Relative to Previous Level) VIN Applied to Input 1 and Input 2; fIN - 20 kHz (Relative to Signal Amplitude at 1 kHz) Volume Attenuator = 40 dB, Loudness on (See Figure 5 ) Gain 100 Hz (Referenced to Gain at 1 kHz) Gain at 10 kHz (Referenced Signal-to-Noise Ratio Channel Balance Channel Separation Input-Input Isolation PSSR fCLK VOUT(1) VOUT(0) Power Supply Rejection Ratio Clock Frequency Logic "1" Input Voltage Logic "0" Input Voltage Logic "1" Output Voltage Logic "0" Output Voltage Pins 27, 28 (IM Bus) Pins 2, 3 Pins 27, 28 (IM Bus) Pins 2, 3 Pin 28 (IM Bus) Pin 28 (IM Bus) 0.4 to Gain at 1 kHz) VIN = 1.0 Vrms, A Weighted, Measured at 1 kHz, = 470 All Volume Settings Input Pins 4, 25: Output Pins 13, 16; VIN = 1.0 Vrms (Note to AC Ground on Unused Input = 9 VDC; 200 mVrms, 100 Hz Sinewave Applied to Pin dB (max) dB (min) dB (max) dB (min) dB (min) dB (max) dB (min) dB (min) dB (min) MHz (max) V (min) V (min) V (max) V (max) V (min) V (max) 86 dB (max) dB (min) dB (max) dB (max) dB (min) dB (max) dB (min) dB (max) dB (max) dB (min) dB (max) dB (max) Typical (Note 6) Limit (Note 7) Unit (Limit) dB (min)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the deivce may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. Note 2: All voltages are specified with respect to ground. Note 3: When the input voltage (VIN) at any pin exceeds the power supply voltages (VIN V- or VIN > V+) the absolute value of the current at that pin should be limited mA or less. The 20 mA package input current limits the number of pins that can exceed the power supply voltages with 5 mA current limit to four. Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, JA, and the ambient temperature TA. The maximum allowable power dissipation PD = (TJMAX - TA)/JA or the number given in the Absolute Maximum Ratings, whichever is lower. For the LMC1983CIN, TJMAX = +125°C, and the typical junction-to-ambient thermal resistance, when board mounted, is 67°C/W.
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