|
Details, datasheet, quote on part number:UPD16310GF-3L9
| |
Datasheet text preview:
MOS INTEGRATED CIRCUIT
µPD16310
HIGH VOLTAGE CMOS DRIVER FOR PDP, EL, VFD
DESCRIPTION
µPD16310 is high voltage driver for PDP, EL or VFD graphic panel structured by CMOS process. Logic power
supply is 5.0 V connecting direct to control logic. Maximum output voltage is 80 V and maximum current is 50 mA.
FEATURES
· 80 V Output Voltage Swing Capability · 50 mA Output Sink and Source Current Capability · 40 bit Shift-register and Latch · High Speed Serial DATA Transferring (fmax. = 20 MHz · Low Standby Current 100 µA
MIN.)
ORDERING INFORMATION
Part Number Package 80-pin plastic QFP (3 direction lead)
µP D 1 6 3 1 0 G F - 3 L 9
Document No. IC-2859 (1st edition) Date Published March 1997 P Printed in Japan
©
1993
µPD16310
PIN CONNECTION DIAGRAM (Top View)
O1 O2 O3 O4 O5 O6 O7 O8 O
9
2 1 3 4 5 6 7 8 9 1 10 11 12 13 14 15 16 17 18 29 20 21 22 23 4 2 5 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
64 63 62 61 50 59 58 57 56 55 54 53 52 51 40 49 48 47 46 45 44 43 42
6
O40 O39 O38 O37 O36 O35 O34 O33 O32 O31 O30 O29 O28 O27 O26 O25 O24 O23 O22 V 21 VDD2 VSS2 VSS2
OSS1
O10 O11 O12 O13 O14 O15 O16 O17 O18 O19 V
20
VDD2 VSS2 VSS2
SS1
O
1
V /L R
PD1 D
NC
NC
C A
NK L
NC
NC
C B
BTB
NK L
VC
ND1 D
C
ote The 33 pin (NC) should be open. All the power supply terminals should be used.
S
VSS1 and VSS2 should be respectively connected with themselves outside. To prevent latch up breakdown, the power should be turned ON in order VDD1, logic input, VDD2. It should be turned OFF in the opposite order. This relationship should be followed during transition period as well.
2
N
C
µPD16310
BLOCK DIAGRAM
BPC S LK TB A
O1
TB
S1 L1
O
C
C
RK L
RLK
/B L
B /L
A
S
40 S L0 4
*
* 40
40 bit Shift Register
40 bit Latch
High Voltage CMOS Driver 80 V ± 50 mAMAX.
3
|
|
