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Details, datasheet, quote on part number:UPD16326AGB-3B4
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Datasheet text preview:
DATA SHEET
MOS INTEGRATED CIRCUIT
µPD16326A
32-BIT FLUORESCENT DISPLAY TUBE DRIVER
The µPD16326A is a fluorescent display tube driver using a high breakdown voltage CMOS process. It consists of 32-bit bidirectional shift registers, a latch circuit, and a high breakdown voltage CMOS driver block. The logic block operates on a 5 V power supply designed to be connected directly to a microcontroller (CMOS level input). The driver block has a 150 V and 20 mA high breakdown voltage output, and both the logic block and driver block consist of CMOS, allowing operation with low power consumption.
FEATURES
· High breakdown voltage CMOS structure · High breakdown voltage, high current output (150 V, 20 mA) · 32-bit bidirectional shift registers on chip · Data control by transfer clock (external) and latch · High-speed data transfer capability (fmax = 8.0 MHz
MIN)
· Wide operating temperature range (TA = 40 to 85 °C)
ORDERING INFORMATION
Part Number Package 44-pin plastic QFP (4-direction leads)
µP D 1 6 3 2 6 A G B - 3 B 4
Document No. S11760EJ1V0DS00 (1st edition) Date Published December 1997 N Printed in Japan
©
1997
µPD16326A
BLOCK DIAGRAM
CLK A R /L 32-bit bidirectional shift registers B
STB BLK
32-bit latch
O1
O2
O32
PIN CONFIGURATION (Top View)
O10 35
44
43
42
41
40
39
38
37
36
VDD2 VSS2 A BLK STB CLK VSS1 R/L VDD1 B VSS2
1 2 3 4 5 6 7 8 9 10 11
12 13 14 15 16 17 18 19 20 21 22
34
O11
O1
O2
O3
O4
O5
O6
O7
O8
O9
33 32 31 30 29 28 27 26 25 24 23
O12 O13 O14 O15 O16 O17 O18 O19 O20 O21 O22
O32
O31
O30
O29
O28
O27
O26
O25
O24
Remark Be sure to enter the power to VDD1, logic signal, and VDD2, in that order, and turn off the power in the reverse order.
2
VDD2
O23
µPD16326A
PIN DESCRIPTION
Pin Symbol STB A B CLK BLK R/L Pin Name Latch strobe input RIGHT data input LEFT data input Clock input Blanking input Shift control input Pin Number 5 3 10 6 4 8 Description H: Data through L: Data retention When R/L = H, A: Input B: Output When R/L = L, A: Output B: Input Shift is executed on a fall. H: O1 to O32: ALL "L" H: Right shift mode A O1 ... O32 B L: Left shift mode B O32 ... O1 A 130 V, 20 mA 5 V ±10 % 30 to 130 V Connected to system GND Connected to system GND
MAX
O1 to O32 VDD1 VDD2 VSS1 VSS2
High breakdown voltage output Logic block power supply Driver block power supply Logic ground Driver ground
13 - 44 9 1, 12 5 2, 11
TRUTH TABLE 1 (SHIFT REGISTER BLOCK)
Input R/L H H L L CLK H or L H or L Output Note 2 Output Input A Output Shift Register B Output Note 1 Output Input Execution of right shift Retained Execution of left shift Retained
Notes 1. On a clock fall, the data items of S31 are shifted to S32, and output from B. 2. On a clock fall, the data items of S2 are shifted to S1, and output from A.
TRUTH TABLE 2 (LATCH BLOCK)
STB L H Operation Retains Sn data immediately before STB becomes L. Outputs shift register data.
TRUTH TABLE 3 (DRIVER BLOCK)
LnNote × × L H STB × L H H BLK H L L L Driver output state L (all driver outputs: L) Outputs Sn data on STB fall. L H
Note Ln: Latch output Remark × = H or L, H = high level, L = Low level
3
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