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Details, datasheet, quote on part number:UPD16337GF-3BA
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Datasheet text preview:
DATA SHEET
MOS INTEGRATED CIRCUIT
µP D 1 6 3 3 7
64-BIT AC-PDP DRIVER
The µPD16337 is a high-voltage CMOS driver designed for flat display panels such as PDPs, VFDs and ELs. It consists of a 64-bit bi-directional shift register (16 bit × 4 circuits), 64-bit latch and high-voltage CMOS driver. The logic block is designed to operate at 5-V power supply, enabling direct connection to a microcontroller. In addition, the µPD16337 achieves low power dissipation by employing CMOS structure while having a high withstand voltage output (150 V, 40 mA MAX.)
FEATURES
· Built in four 16-bit bi-directional shift register circuits · Data control with transfer clock (external) and latch · High-speed data transfer (fmax. = 20 MHz MIN. at cascade connection) · Wide operating temperature range (TA = 40 to +85°C) · High withstand output voltage (150 V, 40 mA MAX.) · 5-V CMOS input interface · High withstand voltage CMOS structure · Capable of reversing all driver outputs by PC pin
ORDERING INFORMATION
Part Number Package 100-pin plastic QFP
µP D 1 6 3 3 7 G F - 3 B A
Document No. S12363EJ1V0DS00 (1st edition) Date Published January 1998 N CP(K) Printed in Japan
©
1998
µPD16337
BLOCK DIAGRAM
PC BLK LE
SR1 A1 CLK R/L B1 A1 CLK R/L B1 S1 S5 . . . . . . . . . . . . . . . . S61 S1 S2 S3 S4
LE L1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . L64 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Note
O1
SR2 A2 A2 CLK R/L B2 B2 S2 S6 . . . . . . . . . . . . . . . . S62
SR3 A3 A3 CLK R/L B3 B3 S3 S7 . . . . . . . . . . . . . . . . S63
SR4 A4 A4 CLK R/L B4 B4 S4 S8 . . . . . . . . . . . . . . . . S64
S61 S62 S63 S64
S64
SRn: 16-bit shift register
Note High withstand voltage CMOS driver, 150 V, ±40 mA (MAX.)
2
µPD16337
PIN CONFIGURATION (Top View)
O42 O41 O40 O39 O38 O37 O36 O35 O34 O33 O32 O31 O30 O29 O28 O27 O26 O25 O24 O23 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 NC VDD2 NC VSS2 NC O43 O44 O45 O46 O47 O48 O49 O50 O51 O52 O53 O54 O55 O56 O57 O58 O59 O60 O61 O62 O63 O64 NC VDD2 NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 NC VDD2 NC VSS2 NC O22 O21 O20 O19 O18 O17 O16 O15 O14 O13 O12 O11 O10 O9 O8 O7 O6 O5 O4 O3 O2 O1 NC VDD2 NC
100-pin plaxtic QFP
51 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
VSS2 NC CLK LE B4 B3 B2 B1 VSS1
R/L VDD1 A1 A2 A3 A4
NC
BLK NC
PC
Cautions 1. Pin 40 is connected to the lead frame, and therefore must be left open. 2. Ensure that the VDD1, VDD2, VSS1 and VSS2 pins are all used, and that VSS1 and VSS2 are used at the same potential. 3. To prevent latch up breakdown, the power should be turned on in the order VDD1, logic signal, VDD2. It should be turned off in the opposite order.
VSS2
3
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