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Details, datasheet, quote on part number:UPD17934GK
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Datasheet text preview:
DATA SHEET
MOS INTEGRATED CIRCUIT
µ PD17933, 17934
4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DIGITAL TUNING SYSTEM HARDWARE
T h e µPD17933 and 17934 are 4-bit single-chip CMOS microcontrollers with hardware for digital tuning s y s t e m s (DTSs). T h e s e microcontrollers integrate a prescaler that operates at a voltage as low as 1.05 V and up to 220 MHz, a PLL frequency synthesizer, an intermediate frequency (IF) counter, and an LCD controller/driver on a single chip. T h e r e f o r e , a high-performance digital tuning system for a portable set can be organized with a single chip.
FEATURES
· P r o g r a m memory (ROM) · P e r i p h e r a l hardware G e n e r a l - p u r p o s e I/O ports, LCD controller/driver, s e r i a l interface, A/D converter, BEEP output, f r e q u e n c y counter · Interrupt E x t e r n a l : 1 source I n t e r n a l : 3 sources · R e s e t by RESET pin · L o w power consumption · S u p p l y voltage: VDD = 1.05 to 1.8 V
µPD17933 µPD17934
4 4 8 × 4 bits ·
: 12K bytes (6144 × 16 bits) : 16K bytes (8192 × 16 bits)
· G e n e r a l - p u r p o s e data memory (RAM) ) Instruction execution time 5 3 . 3 µs (with 75-kHz crystal resonator) · P L L frequency synthesizer D u a l modulus prescaler (220 MHz MAX.), p r o g r a m m a b l e divider, phase comparator, c h a r g e pump
O R D E R I N G INFORMATION
P a r t Number Package 8 0 - p i n plastic TQFP (12 × 12 mm, 0.5 mm pitch) 8 0 - p i n plastic TQFP (12 × 12 mm, 0.5 mm pitch)
µPD17933GK- × × ×-BE9 µPD17934GK- × × ×-BE9
R e m a r k × × × indicates ROM code suffix. U n l e s s otherwise specified, the µPD17934 is explained as the representative model in this document.
The information in this document is subject to change without notice. Document No. U11947EJ2V0DS00 (2nd edition) Date Published July 1998 N CP(K) Printed in Japan
T h e mark
shows major revised points.
©
1997
µPD17933, 17934
F U N C T I O N A L OUTLINE
P a r t Number P r o g r a m memory (ROM) G e n e r a l - p u r p o s e data memory (RAM) I n s t r u c t i o n execution time G e n e r a l - p u r p o s e port 3 7 pins
µPD17933
1 2 K bytes (6144 x 16 bits) 4 4 8 × 4 bits 5 3 . 3 µs (with 75-MHz crystal oscillator) · I / O port · I n p u t port
µPD17934
1 6 K bytes (8192 x 16 bits)
: 20 pins : 11 pins (of which 3 are muxed with LCD segment pins) · O u t p u t port : 6 pins
S t a c k level
· A d d r e s s stack : 15 levels (stack can be manipulated) · I n t e r r u p t stack : 4 levels (stack can be manipulated) · E x t e r n a l : 1 source (INT) · I n t e r n a l : 3 sources (basic timer 0, 8-bit timer, serial interface) 3 · · · channels B a s i c timer 0 (125 ms) B a s i c timer 1 (8 ms, 32 ms) 8 - b i t timer (with event counter)
V e c t o r interrupt ( m a s k a b l e interrupt) Timer
A / D converter L C D controller/driver
8 - b i t s resolution × 3 channels · 2 0 segments, 4 commons · 1 / 4 duty, 1/2 bias, frame frequency: 62.5 Hz, drive voltage VLCD1=3.0 V TYP. · M u x e d segment pins: 3 (Each can be used as general-purpose input port pin.)
S e r i a l interface P L L frequency synthesizer D i v i s i o n mode
1 channel (3-wire/2-wire modes selectable) 2 types · D i r e c t division mode (VCOL pin) · P u l s e swallow mode (VCOL pin/VCOH pin)
R e f e r e n c e frequency C h a r g e pump P h a s e comparator I n t e r m e d i a t e frequency (IF) counter B E E P output Reset
6 types selectable (1, 3, 5, 6.25, 12.5, 25 kHz) E r r o r out output: 2 pins (EO0 and EO1 pins) U n l o c k detectable by program F r e q u e n c y measurement 1 pin (1.5 kHz, 3 kHz) · R e s e t by RESET pin · W a t c h d o g timer reset C a n be set only once on power application: 4096 or 8192 instructions selectable · S t a c k pointger overflow/underflow reset C a n be set only once on power application: Interrupt stack and address stack selectable · A M I F C pin: 400 to 500 kHz · F M I F C pin: 10 to 11 MHz
S u p p l y voltage Package
V DD = 1.05 to 1.8 V 8 0 - p i n plastic TQFP (12 × 12 mm, 0.5 mm pitch)
2
µPD17933, 17934
P I N CONFIGURATION (Top View)
8 0 - p i n plastic TQFP (12 × 12 mm, 0.5 mm pitch)
µPD17933GK- × × ×-BE9 µPD17934GK- × × ×-BE9
P2A2/LCD19 P2A1/LCD18 P2A0/LCD17
P0D3/AD2
P0D2/AD1
P0D1/AD0
P0D0
P2C3
P2C2
P2C1
P2C0
P0C3
P0C2
P0C1
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 P1C0/TM0 P1C1/TM1 P1C2/AMIFC P1C3/FMIFC/AMIFC VDD1 NC EO0 EO1 VCOL VCOH GND TEST RESET P2B0 P2B1 P2B2 P2B3 P0A0 P0A1 P1A0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 LCD16 LCD15 LCD14 LCD13 LCD12 LCD11 LCD10 LCD9 LCD8 LCD7 LCD6 LCD5 LCD4 LCD3 LCD2 LCD1 LCD0 COM3 COM2 COM1
P0B1/SI1/SO2
P0B2/SO1
P0B3/BEEP
P1A1
P1A2
P1A3
P1D0
P1D1
P1D2
P1D3
P0B0/SCK
VDD0
CAPLCD0
CAPLCD1
REGLCD0
REGLCD1
CAPLCD2
P0C0
GND
VDD2
XOUT
INT
XIN
CAPLCD3
REGLCD2
COM0
3
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