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Details, datasheet, quote on part number:UPD6124A
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Datasheet text preview:
DATA SHEET
µPD6124A, 6600A
4-BIT SINGLE-CHIP MICROCONTROLLER FOR REMOTE CONTROL TRANSMISSION
MOS INTEGRATED CIRCUIT
DESCRIPTION
The µPD6124A and 6600A are 4-bit single-chip microcontrollers for infrared remote controllers for TVs, VCRs, stereos, cassette decks, air conditions, etc. These microcontrollers consist of ROM, RAM, a 4-bit parallel-processing ALU, a programmable timer, key input/ output ports, and transmit output ports. Functioning is controlled by a program. A one-time PROM, model µPD61P24, to which a program can be written only once is also available. This one-time PROM is ideal for evaluation of programs running in a µPD6124A or 6600A, and for small-scale production of such systems.
FEATURES
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Transmitter for programmable infrared remote controller 19 types of instructions Instruction execution time: 17.6 µs (with 455-kHz ceramic resonator) Program memory (ROM) capacity · µPD6124A: 1002 × 10 bits · µPD6600A: 512 × 10 bits
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Transmission-in-progress indication pin (S-OUT): 1 pin Transmit carrier frequency (REM) fOSC/12, fOSC/8 Standby operation (HALT/STOP mode) Low power consumption Current consumption in STOP mode (TA = 25°C) Low-voltage operation
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Data memory (RAM) capacity: 32 × 5 bits 9-bit programmable timer: 1 channel I/O pins (KI/O): 8 pins Input pins (KI): 4 pins Serial input pins (S-IN): 1 pin Caution
µPD6124A: VDD = 2.2 to 5.5 V µPD6600A: VDD = 2.2 to 3.6 V
To use the NEC transmission format, ask NEC to supply the custom code. Do not use R0 when using a register as an operand of the branch instruction.
The information in this document is subject to change without notice. Document No. U12391EJ5V0DS00 (5th edition) (Previous No. IC-1927) Date Published June 1997 N Printed in Japan
The mark
shows major revised points.
©
1989
µPD6124A, 6600A
ORDERING INFORMATION
Part Number Package 20-pin plastic shrink DIP (300 mil) 20-pin plastic SOP (300 mil) 20-pin plastic shrink DIP (300 mil) 20-pin plastic SOP (300 mil)
µP D 6 1 2 4 A C S - X X X µP D 6 1 2 4 A G S - X X X µP D 6 6 0 0 A C S - X X X µP D 6 6 0 0 A G S - X X X
Remark
XXX indicates ROM code suffix.
PIN CONFIGURATION (TOP VIEW)
K I/O1 1 K I/O0 2 S-IN 3 S-OUT 4 REM 5 V DD 6 OSC-OUT 7 OSC-IN 8 VSS 9 AC 10
20 K I/O2 19 K I/O3 18 K I/O4 17 K I/O5 16 K I/O6 15 K I/O7 14 K I0 13 K I1 12 K I2 11 K I3
2
µPD6124A, 6600A
BLOCK DIAGRAM
ROM D.P. ROM D.P. PC(L) PC(H)
L H M P X ROM (L) ROM (H)
Note
CNTL CNTL (L) (H) 32 × 5 bits SP ADD DEC M P X RAM RAM
To S-OUT TIMER TIMER (L) (H) 10 bits OSC MOD ALU ACC KEY KEY OUT(L) OUT(H) KEY IN Watchdog Lowvoltage timer detector function circuit
OSC-IN S-OUT REM OSC-OUT
S-IN
KI/O0-KI/O7
K I0 -KI3
AC
Note ROM capacity depends on the products.
DIFFERENCES AMONG PRODUCTS
Item ROM Capacity RAM Capacity I/O Pins S-IN Pins Current Consumption (fOSC = STOP) (MAX.) S-IN High Level Input Current (MAX.) Transmit Carrier Frequency Low-voltage Detector (Reset) Circuit Supply Current Package VDD = 2.2 to 5.5 V · 20-pin plastic SOP (300 mil) · 20-pin plastic shrink DIP (300 mil) VDD = 2.2 to 3.6 V fOSC/12, fOSC/8 Provided 30 µA Product Name
µ PD6124A
1002 × 10 bits (Mark ROM) 32 × 5 bits 8 (KI/O0-KI/O7) Provided 2 µA
µ PD6600A
512 × 10 bits (Mask ROM)
3
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