|
Details, datasheet, quote on part number:UPD75104A
| |
Datasheet text preview:
DATA SHEET
MOS INTEGRATED CIRCUIT
µPD75104, 75106, 75108
4-BIT SINGLE-CHIP MICROCOMPUTER
DESCRIPTION
µPD75108 is a 4-bit single-chip microcomputer integrating timer/event counters, serial interface, and vector
interrupt function, in addition to a CPU, ROM, RAM, and I/O ports, on a single chip. Operating at high speeds, the microcomputer allows data to be manipulated in units of 1, 4, or 8 bits. In addition, various bit manipulation instructions are provided to reinforce I/O manipulation capability. Equipped with I/Os for interfacing with peripheral circuits operating on a different supply voltage, outputs that can directly drive LEDs, and analog inputs, µPD75108 is suitable for controlling such systems as VTRs, acoustic products, button telephones, radio communications equipment, and printers. A pin-compatible EPROM model is also available for evaluation of system development and small-scale production of application systems.
Detailed functions are described in the following user's manual. Be sure to read it for designing.
µPD751XX Series User's Manual: IEM-922
FEATURES
· Internal memory · Program memory (ROM) : 8068 × 8 bits (µPD75108) : 6016 × 8 bits (µPD75106) : 4096 × 8 bits (µPD75104) · Data memory (RAM) : 512 × 4 bits (µPD75108) : 320 × 4 bits (µPD75106, 75104) · New architecture "75X series" rivaling 8-bit microcomputers · 43 systematically organized instructions · A wealth of bit manipulation instructions · 8-bit data transfer, compare, operation, increment, and decrement instructions · 1-byte relative branch instructions · GETI instruction executing 2-/3-byte instruction with one byte · High speed. Minimum instruction execution time: 0.95 µs (at 4.19 MHz), 5 V · Power-saving, instruction time change function: 0.95 µs/1.91 µs/15.3 µs (at 4.19 MHz) · I/O port pins as many as 58 · Three channels of 8-bit timers · 8-bit serial interface · Multiplexed vector interrupt function · Model with PROM is available: µPD75P108B (One-time PROM, EPROM) Unless there are differences among µPD75104, 75106, and 75108 functions, µPD75108 is treated as the representative model throughout this manual.
The information in this document is subject to change without notice.
Document No. IC-2520B (O. D. No. IC-6906B) Date Published January 1994 P Printed in Japan
The mark 5 shows major revised points.
© NEC Corporation 1989
µPD75104, 75106, 75108
ORDERING INFORMATION
Part Number Package 64-pin plastic shrink DIP (750 mil) 64-pin plastic QFP (14 × 20 mm) 64-pin plastic shrink DIP (750 mil) 64-pin plastic QFP (14 × 20 mm) 64-pin plastic shrink DIP (750 mil) 64-pin plastic QFP (14 × 20 mm) Quality Grade Standard Standard Standard Standard Standard Standard
µP D 7 5 1 0 4 C W - x x x µP D 7 5 1 0 4 G F - x x x - 3 B E µP D 7 5 1 0 6 C W - x x x µP D 7 5 1 0 6 G F - x x x - 3 B E µP D 7 5 1 0 8 C W - x x x µP D 7 5 1 0 8 G F - x x x - 3 B E
Remarks: xxx is ROM code number.
Please refer to "Quality Grade on NEC Semiconductor Devices" (Document Number IEI-1209) published by NEC Corporation to know the specification of quality grade on the devices and its recommended applications.
2
µPD75104, 75106, 75108
FUNCTIONAL OUTLINE
Item Number of Basic Instructions Minimum Instruction Execution Time ROM Internal Memory RAM General-Purpose Register Accumulator 8064 × 8 bits (µPD75108), 6016 × 8 bits (µPD75106), 4096 × 8 bits (µPD75104) 512 × 4 bits (µPD75108), 320 × 4 bits (µPD75106, 75104) 4 bits × 8 × 4 banks (memory mapped) Three accumulators selectable according to the bit length of manipulated data: · 1-bit accumulator (CY), 4-bit accumulator (A), and 8-bit accumulator (XA) 58 port pins · CMOS input pins: 10 · CMOS I/O pins (can directly drive LEDs): 32 · Medium voltage N-ch open-drain I/O pins: 12 (can directly drive LEDs. Pull-up resistor can be connected to each bit) · Comparator input pins (4-bit accuracy): 4 · 8-bit timer/event counter × 2 · 8-bit basic interval timer (can be used as watchdog timer) · 8 bits Serial Interface · LSB first/MSB first mode selectable · Two transfer modes (transfer/reception and reception only modes) External: 3, Internal: 4 External: 2 · STOP and HALT modes · · · · Various bit manipulation instructions (set, reset, test, Boolean operation) 8-bit data transfer, compare, operation, increment, and decrement 1-byte relative branch instructions GETI instruction constituting 2 or 3-byte instruction with 1 byte 43 Changeable in three steps: 0.95 µs, 1.91 µs, and 15.3 µs at 4.19 MHz Specifications
I/O Port
Timer/Counter
Vector Interrupt Test Input Standby
Instruction Set
Others
· Power-ON reset circuit (mask option) · Bit manipulation memory (bit sequential buffer: 16 bits) · 64-pin plastic shrink DIP (750 mil) · 64-pin plastic QFP (14 × 20 mm)
Package
3
|
|
