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Details, datasheet, quote on part number:UPD753204
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Datasheet text preview:
DATA SHEET
µPD753204, 753206, 753208
4-BIT SINGLE-CHIP MICROCONTROLLERS
MOS INTEGRATED CIRCUIT
T h e µPD753208 is one of the 75XL Series 4-bit single-chip microcontrollers and has a data processing c a p a b i l i t y comparable to that of an 8-bit microcontroller. T h e µPD753208 has an on-chip LCD controller/driver and is based on the µPD75308B of the 75X Series. H o w e v e r , the µPD75308B is supplied in an 80-pin package, whereas the µPD753208 is supplied in a 48p i n package (375 mils, 0.65-mm pitch) and therefore is suitable for small-scale application systems. In a d d i t i o n , the µPD753208 features expanded CPU functions and performs high-speed operations at a low v o l t a g e of 1.8 V. Detailed information about functions can be found in the following user's manual. Be sure to read it before designing. µPD753208 User's Manual: U10158E
Features
· Low-voltage operation: VDD = 1.8 to 5.5 V Can be driven by two 1.5-V batteries · Internal memory Program memory (ROM): 4096 × 8 bits (µPD753204) 6144 × 8 bits (µPD753206) 8192 × 8 bits (µPD753208) Data memory (RAM): 512 × 4 bits · Variable instruction execution time for high-speed operation and power saving operation 0.95, 1.91, 3.81, 15.3 µs (@ 4.19-MHz operation) 0.67, 1.33, 2.67, 10.7 µs (@ 6.0-MHz operation) · Internal programmable LCD controller/driver · Small package: 48-pin plastic shrink SOP (375 mils, 0.65-mm pitch) · One-time PROM version: µPD75P3216
Applications
R e m o t e controllers, Cameras, Sphygnomamometers, Compact-disc radio cassette player compo systems, g a s meters, etc.
Ordering Information
Part number Package 48-pin plastic shrink SOP (375 mils, 0.65-mm pitch) 48-pin plastic shrink SOP (375 mils, 0.65-mm pitch) 48-pin plastic shrink SOP (375 mils, 0.65-mm pitch) ROM (× 8 bits) 4096 6144 8192
µ PD753204GT-××× µ PD753206GT-××× µ PD753208GT-×××
Remark ××× indicates ROM code suffix. U n l e s s otherwise specified, references in this data sheet to the µPD753208 mean the
µ P D 7 5 3 2 0 4 and the µPD753206.
The information in this document is subject to change without notice.
Document No. U10166EJ2V0DS00 (2nd edition) Date Published March 1997 N Printed in Japan
The mark
shows major revised points.
©
1996
µ PD753204, 753206, 753208
Function Outline
Parameter Instruction execution time Function · 0.95, 1.91, 3.81, 15.3 µs (@ 4.19-MHz operation with system clock) · 0.67, 1.33, 2.67, 10.7 µs (@ 6.0-MHz operation with system clock) ROM 4096 × 8 bits (µPD753204) 6144 × 8 bits (µPD753206) 8192 × 8 bits (µPD753208) RAM General-purpose register 512 × 4 bits · 4-bit operation: 8 × 4 banks · 8-bit operation: 4 × 4 banks 6 20 Connecting on-chip pull-up resistors can be specified by software: 5 Connecting on-chip pull-up resistors can be specified by software: 20 Also used for segment pins: 8 On-chip pull-up resistors can be specified by mask option 13-V withstand voltage
Internal memory
Input/ output port
CMOS input CMOS input/output
N-ch open-drain input/output Total LCD controller/driver
4
30 · Segment selection: · Display mode selection: 4/8/12 segments (can be changed to CMOS input/ output port in 4-time units; max. 8) Static 1/2 duty (1/2 bias) 1/3 duty (1/2 bias) 1/3 duty (1/3 bias) 1/4 duty (1/3 bias)
· On-chip split resistor for LCD drive can be specified by mask option Timer 5 channels · 8-bit timer/event counter: 1 channel · 8-bit timer counter: 2 channels (can be used as the 16-bit timer counter, carrier generator, and timer with gate) · Basic interval timer/watchdog timer: 1 channel · Watch timer: 1 channel · 3-wire serial I/O mode ... MSB or LSB can be selected for transferring first bit · 2-wire serial I/O mode · SBI mode 16 bits · , 524, 262, 65.5 kHz (@ 4.19-MHz operation with system clock) · , 750, 375, 93.8 kHz (@ 6.0-MHz operation with system clock) · 2, 4, 32 kHz (@ 4.19-MHz operation with system clock) · 2.93, 5.86, 46.9 kHz (@ 6.0-MHz with system clock) External: 2, Internal: 5 External: 1, Internal: 1 Ceramic or crystal oscillator for system clock oscillation STOP/HALT mode VDD = 1.8 to 5.5 V 48-pin plastic shrink SOP (375 mils, 0.65-mm pitch)
Serial interface
Bit sequential buffer (BSB) Clock output (PCL)
Buzzer output (BUZ)
Vectored interrupts Test input System clock oscillator Standby function Power supply voltage Package
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µPD753204, 753206, 753208
CONTENTS
1. PIN CONFIGURATION (TOP VIEW) .......... 5 2. BLOCK DIAGRAM .............. 6 3. PIN FUNCTIONS ... 7 3.1 Port Pins ..... 7 3.2 Non-Port Pins ............ 9 3.3 Pin Input/Output Circuits ......... 11 3.4 Recommended Connections for Unused Pins ..... 13 4. SWITCHING FUNCTION BETWEEN Mk I MODE AND Mk II MODE ...... 14 4.1 Difference Between Mk I and Mk II Modes ...... 14 4.2 Setting Method of Stack Bank Select Register (SBS) .. 15 5. MEMORY CONFIGURATION .... 16 6. PERIPHERAL HARDWARE FUNCTION .......... 21 6.1 Digital I/O Port ......... 21 6.2 Clock Generator ...... 22 6.3 Clock Output Circuit ........ 23 6.4 Basic Interval Timer/Watchdog Timer .... 24 6.5 Watch Timer ............ 25 6.6 Timer/Event Counter ........ 26 6.7 Serial Interface ........ 30 6.8 LCD Controller/Driver ...... 32 6.9 Bit Sequential Buffer ....... 34 7. INTERRUPT FUNCTION AND TEST FUNCTION ...... 35 8. STANDBY FUNCTION ...... 37 9. RESET FUNCTION ........... 38 10. MASK OPTION .. 41 11. INSTRUCTION SET .......... 42 12. ELECTRICAL SPECIFICATIONS ............. 56 13. CHARACTERISTIC CURVES (REFERENCE VALUES) .......... 68 14. PACKAGE DRAWINGS ............ 70 15. RECOMMENDED SOLDERING CONDITIONS ......... 71
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